IP Library Granted Patent US 10,929,067
Granted Patent B2
US 10,929,067 · App. 16/564,412 · Granted Feb 23, 2021

Nonvolatile memory system and method for controlling write and read operations in the nonvolatile memory by a host

Inventor: Shinichi Kanno (Ota, JP)
Assignee: TOSHIBA MEMORY CORPORATION
G06F3/0659G06F3/0604G06F3/064G06F3/0679
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Quick Facts
Patent No.
US 10,929,067
App. No.
16/564,412
Granted
Feb 23, 2021
Kind
B2
Abstract

According to one embodiment, a memory system determines a write destination block and a write destination location in the write destination block to which write data is to be written, and notifies a host of an identifier of the write data, a block address of the write destination block, and an offset indicative of the write destination location. The memory system retrieves the write data from a write buffer of the host, and writes the write data to the write destination location. In a case where a read command to designate a physical address of first data is received before a write operation of the first data is finished, the memory system reads the first data from the write buffer of the host.

Claims (48)

1. A memory system connectable to a host, the memory system comprising:

a nonvolatile memory including a plurality of blocks; and

a controller electrically connected to the nonvolatile memory and configured to control the nonvolatile memory, wherein

the controller is configured to:

receive from the host a write command to designate storage location information indicative of a storage location in a write buffer of the host where write data is stored;

determine a write destination block to which the write data is to be written, and a write destination location in the write destination block to which the write data is to be written;

notify the host of an identifier of the write data, a block address of the write destination block, and an offset indicative of the write destination location in the write destination block;

retrieve the write data from the write buffer of the host on a basis of the storage location information, and write the write data to the write destination location in the write destination block;

receive from the host a read command to designate a physical address indicative of a storage location where first data to be read is stored;

in a case where a write operation of the first data is already finished such that the first data is readable from the nonvolatile memory, read the first data from the nonvolatile memory; and

in a case where the read command is received before the write operation of the first data is finished such that the first data becomes readable, read the first data from the write buffer of the host.

2. The memory system of claim 1 , wherein

the controller is configured, in a case where the write operation of the write data is failed, to write the write data to a write destination location in the other block that is different from the write destination block, and to notify the host of an identifier of the write data, a block address of the other block, and an offset indicative of the write destination location in the other block, as an address change request.

3. The memory system of claim 2 , wherein

the controller is configured, in a case where the write operation of the write data is failed, to retrieve again the write data from the write buffer.

4. The memory system of claim 1 , wherein

the controller is configured to transmit to the host a release request to release a region in the write buffer where the write data is stored, after the write operation of the write data is finished such that the write data becomes readable.

5. A memory system connectable to a host, the memory system comprising:

a nonvolatile memory including a plurality of blocks; and

a controller electrically connected to the nonvolatile memory and configured to control the nonvolatile memory, wherein

the controller is configured to:

receive from the host a write command to designate a first identifier of a plurality of identifiers to access a plurality of regions each being a subset of the blocks, an identifier of the write data, and storage location information indicative of a storage location in a write buffer of the host where write data is stored;

allocate one of blocks of a common free block group shared by the regions as a write destination block for a region corresponding to the first identifier, and determine a write destination location in the write destination block to which the write data is to be written;

notify the host of an identifier of the write data, a block address of the write destination block, and an offset indicative of the write destination location in the write destination block;

retrieve the write data from the write buffer of the host on [Men a basis of the storage location information, and write the write data to the write destination location in the write destination block;

receive from the host a read command to designate a physical address indicative of a storage location where first data to be read is stored;

in a case where a write operation of the first data is already finished such that the first data is readable from the nonvolatile memory, read the first data from the nonvolatile memory; and

in a case where the read command is received before the write operation of the first data is finished such that the first data becomes readable, read the first data from the write buffer of the host.

6. The memory system of claim 5 , wherein

the controller is configured, in a case where the write operation of the write data is failed, to write the write data to a write destination location in the other block that is different from the write destination block, and to notify the host of an identifier of the write data, a block address of the other block, and an offset indicative of the write destination location in the other block; as an address change request.

7. The memory system of claim 6 , wherein

the controller is configured; in a case where the write operation of xe write data is failed, to retrieve again the write data from the write buffer.

8. The memory system of claim 5 , wherein

the controller is configured to transmit to the host a release request to release a region in the write buffer where the write data is stored, after the write operation of the write data is finished such that the write data becomes readable.

9. A method of controlling a nonvolatile memory including a plurality of blocks, the method comprising:

receiving from a host a write command to designate storage location information indicative of a storage location in a write buffer of the host where write data is stored;

determining a write destination block to which the write data is to be mitten, and a write destination location in the write destination block to which the write data is to be written;

notifying the host of an identifier of the write data, a block address of the write destination block, and an offset indicative of the write destination location in the write destination block;

retrieving the write data from the write buffer of the host on a basis of the storage location information, and writing the write data to the write destination location in the write destination block;

receiving from the host a read command to designate a physical address indicative of a storage location where first data to be read is stored;

in a case where a write operation of the first data is already finished such that the first data is readable from the nonvolatile memory, reading the first data from the nonvolatile memory; and

in a case where the read command is received before the write operation of the first data is finished such that the first data becomes readable, reading the first data from the write buffer of the host.

10. The method of claim 9 , further comprising:

in a case where the write operation of the write data is failed, writing the write data to a write destination location in the other block that is different from the write destination block, and notifying the host of an identifier of the write data, a block address of the other block, and an offset indicative of the write destination location in the other block, as an address change request.

11. The method of claim 10 , further comprising:

in a case where the write operation of the write data is failed, retrieving again the write data from the write buffer.

12. The method of claim 9 , further comprising:

transmitting to the host a release request to release a region in the write buffer where the write data is stored, after the write operation of the write data is finished such that the write data becomes readable.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2019
From: KANNO, SHINICHI
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051065/0401 →