IP Library Granted Patent US 11,024,391
Granted Patent B1
US 11,024,391 · App. 16/569,614 · Granted Jun 1, 2021

System and method for estimating uninformed log-likelihood ratio (LLR) for NAND flash memories

Inventors: Avi Steiner (Kiriat Motzkin, IL); Hanan Weingarten (Herzliya, IL)
Assignee: Toshiba Memory Corporation
G11C16/26G06F11/1024G11C16/34G11C29/50004H03M13/3927
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Quick Facts
Patent No.
US 11,024,391
App. No.
16/569,614
Granted
Jun 1, 2021
Kind
B1
Abstract

A flash memory system may include a flash memory and a circuit for performing operations of the flash memory. The circuit may be configured to estimate slope information of a plurality of threshold voltage samples based on a first read operation on the flash memory with a first reference voltage. The circuit may be configured to generate soft information based on the estimated slope information. The circuit may be configured to decode a result of a second read operation on the flash memory based on the soft information.

Claims (50)

1. A method for operating a flash memory using a decoder, the method comprising:

estimating slope information using a plurality of threshold voltage samples obtained by performing a soft sampling on the flash memory, the soft sampling including a plurality of reads using a plurality of thresholds with respect to a reference voltage, the soft sampling providing an indication of a current stress condition of the flash memory;

generating soft information for use by the decoder based on the estimated slope information; and

decoding, by the decoder, a result of a read operation on the flash memory based on the soft information that was generated based on the estimated slope information.

2. The method of claim 1 , wherein estimating slope information comprises:

estimating first slope information and second slope information, and

estimating a slope ratio as the slope information based on the first slope information and the second slope information.

3. The method of claim 2 , wherein generating the soft information further comprises:

generating log-likelihood ratio (LLR) values as the soft information based on the slope ratio.

4. The method of claim 3 , wherein generating the soft information further comprises:

mapping the slope ratio to estimated LLR values of hard errors; and

generating the LLR values as the soft information based on the estimated LLR values of hard errors.

5. The method of claim 4 , wherein a plurality of ranges of the slope ratio are mapped to respective LLR values of hard errors.

6. The method of claim 4 , wherein the slope ratio is mapped to the estimated LLR values of hard errors using a predefined table.

7. The method of claim 2 , wherein estimating the slope information further comprises:

generating a histogram of the plurality of threshold voltage samples having a plurality of bins;

estimating the first slope information based on a first set of the plurality of bins of the histogram, the first set of the plurality of bins having a first voltage relationship with respect to the reference voltage; and

estimating the second slope information based on a second set of the plurality of bins of the histogram, the second set of the plurality of bins having a second different voltage relationship with respect to the reference voltage.

8. The method of claim 7 , wherein the first set and the second set together comprise a subset of the plurality of bins of the histogram.

9. The method of claim 7 , wherein generating the soft information comprises:

initializing a plurality of log-likelihood ratio (LLR) values based on a Gaussian distribution; and

modifying the plurality of LLR values based on the slope ratio.

10. The method of claim 9 , wherein modifying the plurality of LLR values based on the slope ratio comprises:

modifying, based on the slope ratio, one of the plurality of LLR values corresponding to a predetermined one of the first or second sets of the plurality of bins.

11. A flash memory system comprising:

a flash memory; and

a circuit having a decoder for performing operations of the flash memory, the circuit being configured to:

estimate slope information using a plurality of threshold voltage samples obtained by performing a soft sampling on the flash memory, the soft sampling including a plurality of reads using a plurality of thresholds with respect to a reference voltage, the soft sampling providing an indication of a current stress condition of the flash memory;

generate soft information for use by the decoder based on the estimated slope information; and

decode, by the decoder, a result of a read operation on the flash memory based on the soft information that was generated based on the estimated slope information.

12. The flash memory system of claim 11 , wherein in estimating slope information, the circuit is further configured to:

estimate first slope information and second slope information, and

estimate a slope ratio as the slope information based on the first slope information and the second slope information.

13. The flash memory system of claim 12 , wherein in generating the soft information, the circuit is further configured to:

generate log-likelihood ratio (LLR) values as the soft information based on the slope ratio.

14. The flash memory system of claim 13 , wherein in generating the soft information, the circuit is further configured to:

map the slope ratio to estimated LLR values of hard errors; and

generate the LLR values as the soft information based on the estimated LLR values of hard errors.

15. The flash memory system of claim 14 , the circuit is further configured to map a plurality of ranges of the slope ratio to respective LLR values of hard errors.

16. The flash memory system of claim 14 , wherein the slope ratio is mapped to the estimated LLR values of hard errors using a predefined table.

17. The flash memory system of claim 12 , wherein in estimating the slope information, the circuit is further configured to:

generate a histogram of the plurality of threshold voltage samples having a plurality of bins;

estimate the first slope information based on a first set of the plurality of bins of the histogram, the first set of the plurality of bins having a first voltage relationship with respect to the reference voltage; and

estimate the second slope information based on a second set of the plurality of bins of the histogram, the second set of the plurality of bins having a second different voltage relationship with respect to the reference voltage.

18. The flash memory system of claim 17 , wherein the first set and the second set together comprise a subset of the plurality of bins of the histogram.

19. The flash memory system of claim 17 , wherein in generating the soft information, the circuit is further configured to:

initialize a plurality of log-likelihood ratio (LLR) values based on a Gaussian distribution; and

modify the plurality of LLR values based on the slope ratio.

20. The flash memory system of claim 19 , wherein in modifying the plurality of LLR values based on the slope ratio, the circuit is further configured to:

modify, based on the slope ratio, one of the plurality of LLR values corresponding to a predetermined one of the first or second sets of the plurality of bins.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2020
From: STEINER, AVI; WEINGARTEN, HANAN
To: OCZ ISRAEL LIMITED
Reel/Frame 052896/0554 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2020
From: OCZ ISRAEL LIMITED
To: TOSHIBA MEMORY AMERICA, INC.
Reel/Frame 052896/0653 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2020
From: TOSHIBA MEMORY AMERICA, INC.
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 052896/0800 →
Cited By (3)
US 12,273,127 US 12,374,413 US 12,711,059