Electronic device providing a temperature sensor or a current source delivering a temperature independent current

1. An electronic device, comprising:

a circuit module having a first output terminal that is configured to deliver a positive temperature coefficient output voltage;

wherein the circuit module comprises:

a thermistor having a first MOS transistor configured to operate in weak inversion mode and have a negative temperature coefficient drain-source resistance and whose source is coupled to said first output terminal, and

a current source having a control terminal coupled to the first output terminal and configured to impose a drain-source current of the first MOS transistor.

2. The device according to claim 1 , wherein the current source comprises a second MOS transistor having a gate that is coupled to the first output terminal, the second MOS transistor being configured to operate in strong inversion mode and have a gate leakage current configured to impose the drain-source current of the first MOS transistor.

3. The device according to claim 2 , wherein the first and second MOS transistors are NMOS transistors.

4. The device according to claim 2 , wherein the gate leakage current of the second MOS transistor has a same order of magnitude as the drain-source current of the first MOS transistor.

5. The device according to claim 4 , wherein a thickness of a gate oxide of the second MOS transistor is less than 2 nm.

6. The device according to claim 2 , further comprising:

a negative temperature coefficient MOS transistor having a gate that is coupled to a drain of the first MOS transistor, a source that is coupled to a source of the second MOS transistor of the circuit module, and a drain that is coupled to a drain of the second MOS transistor,

wherein the sources of the second MOS transistor and the negative temperature coefficient MOS transistor form a second output.

7. The device according to claim 6 , wherein the negative temperature coefficient MOS transistor is an NMOS transistor.

8. The device according to claim 6 , wherein said second output generates a substantially temperature-independent output current.

9. The device according to claim 6 , produced on a silicon-on-insulator substrate, wherein each of the first MOS transistor, the second MOS transistor and the negative temperature coefficient MOS transistor has a back gate, and the back gates are coupled together to receive a common voltage.

10. The device according to claim 9 , wherein the silicon-on-insulator substrate is a fully or partly depleted silicon-on-insulator substrate.

11. The device according to claim 6 , wherein the device is a component of an electronic appliance selected from the group consisting of a cellular mobile telephone, a tablet and a laptop computer.

12. The device according to claim 1 , wherein said circuit module forms a temperature sensor with an output voltage at said first output terminal varying proportionally to temperature.

13. The device according to claim 1 , produced in an integrated manner.

14. The device according to claim 13 , produced on a silicon-on-insulator substrate.

15. The device according to claim 14 , wherein the silicon-on-insulator substrate is a fully or partly depleted silicon-on-insulator substrate.

16. The device according to claim 1 , produced on a silicon-on-insulator substrate, wherein each of the first MOS transistor and the second MOS transistor has a back gate, and the back gates are coupled together to receive a common voltage.

17. The device according to claim 1 , wherein the device is a component of an electronic appliance selected from the group consisting of a cellular mobile telephone, a tablet and a laptop computer.

18. An electronic device, comprising:

a first MOS transistor configured as a thermistor and having a source coupled to a first output terminal, a drain coupled to a supply voltage node and a gate coupled to the drain such that the first MOS transistor operates in a weak inversion mode with a negative temperature coefficient drain-source resistance; and

a second MOS transistor configured as a current source and having a gate coupled to the first output terminal to impose a drain-source current of the first MOS transistor, a drain and a source.

19. The device according to claim 18 , wherein the second MOS transistor operates in strong inversion mode and has a gate leakage current which imposes the drain-source current of the first MOS transistor.

20. The device according to claim 18 , wherein the first and second MOS transistors are NMOS transistors.

21. The device according to claim 18 , wherein an output voltage at said first output terminal varies proportionally to temperature.

22. The device according to claim 18 , produced on a silicon-on-insulator substrate, wherein each of the first MOS transistor and the second MOS transistor has a back gate, and the back gates are coupled together to receive a common voltage.

23. An electronic device, comprising:

a first MOS transistor configured as a thermistor and having a source coupled to a first node, a drain coupled to a control node and a gate coupled to a supply voltage node;

a second MOS transistor configured as a current source and having a gate coupled to the first node to impose a drain-source current of the first MOS transistor, a drain coupled to the supply voltage node and a source coupled to an output node; and

a third MOS transistor having a gate coupled to the control node, a drain coupled to the supply voltage node and a source coupled to the output node.

24. The device according to claim 23 , wherein the first, second and third MOS transistors are NMOS transistors.

25. The device according to claim 23 , wherein the output node generates a current which is substantially temperature-independent.

26. The device according to claim 23 , produced on a silicon-on-insulator substrate, wherein each of the first MOS transistor, the second MOS transistor and the third MOS transistor has a back gate, and the back gates are coupled together to receive a common voltage.

27. The device according to claim 26 , wherein the silicon-on-insulator substrate is a fully or partly depleted silicon-on-insulator substrate.