IP Library Granted Patent US 11,038,426
Granted Patent B2
US 11,038,426 · App. 16/575,758 · Granted Jun 15, 2021

Multi-phase noise cancelled adjustable switched mode programmable load

Inventor: Chin-Hong Cheah (Pulau Pinang, MY)
Assignee: National Instruments Corporation
H02M3/1584H02M2003/1586
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Quick Facts
Patent No.
US 11,038,426
App. No.
16/575,758
Granted
Jun 15, 2021
Kind
B2
Abstract

Circuits and methods for operating a programmable load circuit that includes a plurality of sub-circuits connected in parallel between an input and an output. Each sub-circuit may include an inductor, a load, and a switch coupled to the inductor. Each switch may be configurable in a first state and a second state, wherein the inductor is either connected to the output through the load or connected to the output through a connection that bypasses the load. The switches of the plurality of first sub-circuits may be programmable to periodically switch between the first state and the second state according to a duty cycle, and the switches may be out of phase with each other by a predetermined amount. The duty cycle may be programmable to tune the load of the programmable load circuit.

Claims (66)

1. A programmable load circuit, comprising:

a plurality of first sub-circuits connected in parallel between an input and an output of the programmable load circuit, wherein each first sub-circuit comprises:

a respective inductor;

a respective switch electrically coupled to the inductor that is configurable in a first state and a second state, wherein while the switch is in the first state the inductor is connected to the output through a respective load, and wherein while the switch is in the second state a connection is established between the inductor and the output that bypasses the respective load; and

the respective load electrically coupled to the inductor, wherein the respective load comprises a respective second sub-circuit comprising:

a respective capacitor connected in parallel to a respective switchable fixed resistor, wherein the switchable fixed resistor is configured to periodically switch between an on state and an off state,

wherein the switchable fixed resistor is configured to be in the off state while the switch of the respective first subcircuit is in the second state, and

wherein the switchable fixed resistor is configured to be in the on state for at least a portion of a time that the switch of the respective first subcircuit is in the first state,

wherein the respective switches of the plurality of first sub-circuits are programmable to periodically switch between the first state and the second state, wherein the respective switches of the plurality of first sub-circuits switch out of phase with each other by a predetermined amount, and wherein the predetermined amount is operable to reduce a variance over time in a summation of currents passing through the plurality of first sub-circuits.

2. The programmable load circuit of claim 1 ,

wherein the predetermined amount is based at least in part on a number of first sub-circuits in the plurality of first sub-circuits.

3. The programmable load circuit of claim 1 ,

wherein the predetermined amount comprises a fraction of a period of the switching between the first state and the second state, wherein a denominator of the fraction is equal to a number of first sub-circuits in the plurality of first sub-circuits.

4. The programmable load circuit of claim 1 ,

wherein a duty cycle of the periodic switching between the first state and the second state is determined based at least in part on a number of first sub-circuits in the plurality of first sub-circuits.

5. The programmable load circuit of claim 4 ,

wherein the duty cycle of the periodic switching between the first state and the second state is equal to n/m, where m is the number of first sub-circuits in the plurality of first sub-circuits and n is a positive integer smaller than m.

6. The programmable load circuit of claim 1 ,

wherein a duty cycle of the periodic switching between the first state and the second state is selectable to tune an effective resistance of the programmable load circuit.

7. The programmable load circuit of claim 1 ,

wherein the portion of the time that the switchable fixed resistor is in the on state while the switch of the respective first subcircuit is in the first state is adjustable to tune an effective resistance of the respective load.

8. The programmable load circuit of claim 1 ,

wherein for each second sub-circuit, the respective capacitor is inductively connected in parallel to the respective switchable fixed resistor.

9. A programmable load circuit, comprising:

a plurality of first sub-circuits connected in parallel between an input and an output of the programmable load circuit, wherein each first sub-circuit comprises:

a respective inductor;

a respective first switch electrically coupled to the inductor;

a respective adjustable load circuit electrically coupled to the inductor and the respective first switch, the adjustable load circuit comprising:

a respective second switch connected in series with a respective resistor, wherein the respective second switch is configured to periodically switch between an on state and an off state;

a respective capacitor connected in parallel to the respective second switch connected in series with the resistor,

wherein, for each first sub-circuit, the respective first switch is configurable in a first state and a second state, wherein while the first respective switch is in the first state the respective inductor is connected to the output through the respective adjustable load circuit, and wherein while the respective first switch is in the second state a connection is established between the inductor and the output that bypasses the adjustable load circuit, wherein the respective first switch is programmable to periodically switch between the first state and the second state according to a first duty cycle,

wherein, for each first subcircuit, the respective second switch is configured to be in the off state while the respective first switch is in the second state, and

wherein, for each first subcircuit, the respective second switch is configured to be in the on state for at least a portion of the time that the respective first switch is in the first state.

10. The programmable load circuit of claim 9 ,

wherein a second duty cycle of the second switches is programmable to adjust an overall effective load of the programmable load circuit.

11. The programmable load circuit of claim 9 ,

wherein the respective first switch of each first sub-circuit are out of phase with each other by a predetermined amount, and wherein the predetermined amount is operable to reduce a variance over time in a summation of currents passing through the plurality of first sub-circuits.

12. The programmable load circuit of claim 9 ,

wherein the first duty cycle is programmable to tune an effective resistance of the programmable load circuit.

13. The programmable load circuit of claim 9 ,

wherein each adjustable load circuit further comprises:

a respective second sub-circuit, wherein the capacitor of the respective adjustable load circuit is comprised within the second sub-circuit, wherein the second sub-circuit is connected to the inductor of the respective first sub-circuit; and

a respective load-bearing sub-circuit inductively connected to the respective second sub-circuit, wherein the resistor of the respective adjustable load circuit is comprised within the load-bearing sub-circuit.

14. A method for operating a programmable load circuit, the method comprising:

receiving user input to specify a load for the programmable load circuit;

determining a value for a first duty cycle and a second duty cycle based at least in part on the specified load,

wherein the first duty cycle is associated with switching each of a plurality of first switches between a first state and a second state, wherein the first state couples a respective inductor to a respective load sub-circuit and the second state couples the respective inductor to ground,

wherein each load sub-circuit comprises:

a respective second switch connected in series with a respective resistor and

a respective capacitor connected in parallel with the respective second switch connected in series with the resistor, wherein the second duty cycle is associated with activation of the second switches, wherein the method further comprises:

operating the first switches and the second switches according to the first duty cycle and the second duty cycle, respectively, such that the programmable load circuit exhibits the specified load.

15. The method of claim 14 ,

wherein the first duty cycle and the second duty cycle are selected such that each respective second switch off when the respective first switch is off, and

wherein the first duty cycle and the second duty cycle are further selected such that each respective second switch is on for a portion of a time when the respective first switch is on.

16. The method of claim 14 ,

wherein the plurality of first switches are comprised within respective sub-circuits that are connected in parallel, and

wherein the respective first switches of different sub-circuits are out-of-phase with each other in activation by a predetermined amount.

17. The method of claim 16 ,

wherein the predetermined amount comprises a fraction of a period of the switching between the first state and the second state, wherein a denominator of the fraction is equal to a total number of the sub-circuits.

18. The method of claim 14

wherein the first duty cycle is equal to n/m, where m is a total number of first switches and n is a positive integer smaller than m.

19. The method of claim 14 , wherein the load sub-circuits each comprise:

a respective first portion connected to the respective inductor; and

a respective second portion inductively connected to the first portion, wherein the second portion comprises the respective resistor.

20. The method of claim 14 , the method further comprising:

adjusting the load of the programmable load circuit by adjusting the second duty cycle.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2019
From: CHEAH, CHIN-HONG
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 050472/0793 →