Memory system and method of operating the same

1. A memory system, comprising:

a memory device including memory cells, each having a state corresponding to any one of an erased state or one of a plurality of programmed states; and

a memory controller in communication with the memory device and configured to estimate an optimal read voltage associated with at least one of the erased state or one of the plurality of programmed states based on a threshold voltage distribution corresponding to at least one of the plurality of programmed states,

wherein the memory controller comprises:

a threshold voltage distribution checker configured to check a first threshold voltage distribution corresponding to a first programmed state, among the plurality of programmed states, and determine an average threshold voltage of the first threshold voltage distribution; and

an optimal read voltage estimator configured to estimate a second optimal read voltage corresponding to a second side of the first threshold voltage distribution, based on the average threshold voltage of the first threshold voltage distribution and a first optimal read voltage corresponding to a first side of the first threshold voltage distribution, and

wherein the optimal read voltage estimator is configured to estimate the second optimal read voltage so that a value, obtained by reflecting a first weight corresponding to channel characteristics of the memory cells in a difference value between the average threshold voltage of the first threshold voltage distribution and the first optimal read voltage, is equal to a difference value between the average threshold voltage of the first threshold voltage distribution and the second optimal read voltage.

2. The memory system according to claim 1 , wherein the memory controller further comprises an optimal read voltage determiner configured to select one of preset values as the first optimal read voltage.

3. The memory system according to claim 1 , wherein:

the threshold voltage distribution checker further checks a second threshold voltage distribution that is adjacent to the first side of the first threshold voltage distribution and that corresponds to a second programmed state, among the plurality of programmed states, and

the memory controller further comprises an optimal read voltage determiner configured to select a voltage corresponding to a valley between the first threshold voltage distribution and the second threshold voltage distribution as the first optimal read voltage.

4. The memory system according to claim 1 , wherein the optimal read voltage estimator is configured to estimate an optimal read voltage level situated at the second side of the first threshold voltage distribution based on a value obtained by reflecting a second weight corresponding to the channel characteristics in a difference value between the first optimal read voltage and the second optimal read voltage.

5. The memory system according to claim 1 , wherein the channel characteristics are related to at least one of a program/erase cycle or a retention time corresponding to the memory cells.

6. The memory system according to claim 1 , wherein:

the first programmed state is adjacent to the erased state, and

the second optimal read voltage is a voltage for distinguishing the first programmed state from the erased state.

7. The memory system according to claim 1 , wherein each of threshold voltage distributions respectively corresponding to the plurality of programmed states is a unimodal distribution or a distribution that is capable of being approximated to the unimodal distribution.

8. The memory system according to claim 1 , wherein the memory controller further comprises a read operation controller configured to perform a read operation on the memory cells using the estimated second optimal read voltage.

9. A memory system, comprising:

a memory device including memory cells, each having a state corresponding to any one of an erased state and one of a plurality of programmed states; and

a memory controller in communication with the memory device and configured to estimate an optimal read voltage associated with at least one of the erased state and one of the plurality of programmed states based on a threshold voltage distribution corresponding to at least one of the plurality of programmed states,

wherein the memory controller comprises:

a threshold voltage distribution checker configured to check a first threshold voltage distribution corresponding to a first programmed state, among the plurality of programmed states, and determine an average threshold voltage of the first threshold voltage distribution; and

an optimal read voltage estimator configured to estimate a second optimal read voltage corresponding to a second side of the first threshold voltage distribution, based on the average threshold voltage of the first threshold voltage distribution and a first optimal read voltage corresponding to a first side of the first threshold voltage distribution, and wherein the optimal read voltage estimator is configured to estimate the second optimal read voltage so that a difference value between the average threshold voltage of the first threshold voltage distribution and the first optimal read voltage is equal to a difference value between the average threshold voltage of the first threshold voltage distribution and the second optimal read voltage.

10. The memory system according to claim 9 , wherein:

the first programmed state is adjacent to the erased state, and

the second optimal read voltage is a voltage for distinguishing the first programmed state from the erased state.

11. A method of operating a memory system, the memory system including memory cells, each configured to have a state corresponding to one of an erased state or one of a plurality of programmed states, the method comprising:

determining an average threshold voltage of a first threshold voltage distribution corresponding to a first programmed state;

determining a first optimal read voltage corresponding to a first side of the first threshold voltage distribution; and

estimating a second optimal read voltage corresponding to a second side of the first threshold voltage distribution, based on the average threshold voltage of the first threshold voltage distribution and the first optimal read voltage,

wherein estimating the second optimal read voltage comprises:

calculating a difference value between the average threshold voltage of the first threshold voltage distribution and the first optimal read voltage;

reflecting a first weight corresponding to channel characteristics of the memory cells in the calculated difference value; and

estimating the second optimal read voltage so that the difference value in which the first weight is reflected is equal to a difference value between the average threshold voltage of the first threshold voltage distribution and the second optimal read voltage.

12. The method according to claim 11 , wherein determining the first optimal read voltage comprises selecting one of preset values as the first optimal read voltage.

13. The method according to claim 11 , further comprising checking a second threshold voltage distribution that is adjacent to the first side of the first threshold voltage distribution and that corresponds to a second programmed state, among the plurality of programmed states,

wherein determining the first optimal read voltage comprises selecting a voltage corresponding to a valley between the first threshold voltage distribution and the second threshold voltage distribution as the first optimal read voltage.

14. The method according to claim 11 , further comprising:

calculating a difference value between the first optimal read voltage and the second optimal read voltage;

reflecting a second weight corresponding to the channel characteristics in the calculated difference value; and

estimating an optimal read voltage between threshold voltage distributions disposed on the second side of the first threshold voltage distribution based on the difference value in which the second weight is reflected.

15. The method according to claim 11 , wherein the channel characteristics are related to at least one of a program/erase cycle or a retention time corresponding to the memory cells.

16. The method according to claim 11 , wherein:

the first programmed state is adjacent to the erased state, and

the second optimal read voltage is a voltage for distinguishing the first programmed state from the erased state.

17. The method according to claim 11 , wherein each of threshold voltage distributions respectively corresponding to the plurality of programmed states is a unimodal distribution or a distribution that is capable of being approximated to the unimodal distribution.

18. The method according to claim 11 , further comprising performing a read operation on the memory cells using the estimated second optimal read voltage.

19. A method of operating a memory system, the memory system including memory cells, each configured to have a state corresponding to one of an erased state and one of a plurality of programmed states, the method comprising:

determining an average threshold voltage of a first threshold voltage distribution corresponding to a first programmed state;

determining a first optimal read voltage corresponding to a first side of the first threshold voltage distribution; and

estimating a second optimal read voltage corresponding to a second side of the first threshold voltage distribution, based on the average threshold voltage of the first threshold voltage distribution and the first optimal read voltage, wherein estimating the second optimal read voltage comprises:

calculating a difference value between the average threshold voltage of the first threshold voltage distribution and the first optimal read voltage; and

estimating the second optimal read voltage so that the calculated difference value is equal to a difference value between the average threshold voltage of the first threshold voltage distribution and the second optimal read voltage.

20. The method according to claim 19 , wherein:

the first programmed state is adjacent to the erased state, and

the second optimal read voltage is a voltage for distinguishing the first programmed state from the erased state.