IP Library Granted Patent US 10,693,384
Granted Patent B1
US 10,693,384 · App. 16/579,339 · Granted Jun 23, 2020

Accurate feed-forward sensing in flyback-transformer based secondary controller

Inventors: Partha Mondal (Paschim Medinipur, IN); Hemant P. Vispute (Bangalore, IN); Arun Khamesra (Bangalore, IN); Hariom Rai (Bangalore, IN); Pulkit Shah (Bangalore, IN)
Assignee: Cypress Semiconductor Corporation
H02M3/33592H02M3/33576
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Quick Facts
Patent No.
US 10,693,384
App. No.
16/579,339
Granted
Jun 23, 2020
Kind
B1
Abstract

A secondary side controller for an AC-DC converter and method for operating the same are provided. Generally, the controller includes a single synchronous rectifier sense (SR-SNS) pin coupled to a drain of a SR on a secondary of a transformer to sense a voltage (V SRD ). In feed-forward (FF) mode V SRD is a sum of a voltage (V IN ) on a primary divided by a turn-ratio (N) of the transformer and an output bus voltage (V BUS ). A voltage-to-current (V2I) converter coupled to the SR-SNS pin and to the output bus removes V BUS from V SRD . A sample and hold (S/H) module coupled to the SR-SNS pin samples a voltage (V SAMP ) including information on V IN /N. A V IN /N V2I converter coupled to the S/H module converts V SAMP to a feed-forward current (I FF ), and a cancellation and signal module coupled thereto extracts information on V IN from I FF and generates signals to control the AC-DC converter.

Claims (38)

1. A secondary side controller for an AC-DC converter, the secondary side controller comprising:

a single synchronous rectifier sense (SR-SNS) pin coupled to a drain of a synchronous rectifier (SR) on a secondary side of a transformer in the AC-DC converter to sense a voltage (V SRD ) on the drain, wherein V SRD comprises a sum of a voltage (V IN ) applied to a primary side of the transformer divided by a turn ratio (N) of the transformer and a voltage (V BUS ) on an output bus coupled to the secondary side, and

a V BUS voltage-to-current (V2I) converter coupled to the output bus and to the SR-SNS pin to remove from a voltage (V SR-SNS ) on the SR-SNS pin a component of V SRD arising from V BUS ;

a sample and hold (S/H) module coupled to the SR-SNS pin to sample and hold a voltage (V SAMP ) comprising information on V IN /N;

a V IN /N V2I converter coupled to the S/H module to convert V SAMP to a feed-forward current (I FF ) comprising information on V IN /N; and

a N cancellation and signal module coupled to the V IN /N V2I converter to extract from the I FF information on V IN and generate feed-forward (FF) signals used by the secondary side controller to control the AC-DC converter.

2. The secondary side controller of claim 1 , wherein the SR-SNS pin is one pin of an integrated circuit comprising the V BUS V2I converter, the S/H module, the V IN /N V2I converter and the N cancellation and signal module.

3. The secondary side controller of claim 1 , wherein the single SR-SNS pin is coupled to the drain of the SR through a voltage divider including elements both internal and external to the IC.

4. The secondary side controller of claim 3 , wherein the elements of the voltage divider includes an external resistive element (Rext) having a resistance based on V IN and N.

5. The secondary side controller of claim 4 , wherein the V BUS V2I converter is configured to sink a current (I VBUS ) drawn through Rext to remove from V SR-SNS the component of V SRD arising from V BUS .

6. The secondary side controller of claim 4 , wherein the V BUS V2I converter is a temperature compensated circuit configured so that I VBUS is constant across temperature.

7. The secondary side controller of claim 4 , wherein the V BUS V2I converter is coupled to the SR-SNS pin through the V IN /N V2I converter, and wherein the V BUS V2I converter is configured to subtract from IFF in the V IN /N V2I converter a current substantially equivalent to a current capable of generating V BUS across a resistance equal to Rext.

8. The secondary side controller of claim 1 , wherein the FF signals generated by the N cancellation and signal module include FF over voltage (FF_OV) and FF under voltage (FF_UV) signals.

9. The secondary side controller of claim 1 , configured to control the AC-DC converter to provide a DC output compatible with a universal serial bus type C standard (USB-C).

10. A system comprising:

a transformer including a primary side coupled to receive an input voltage (V IN ), and a secondary side having an output and a synchronous rectifier (SR) coupled between the DC output and the secondary side; and

a secondary controller comprising:

a single synchronous rectifier sense (SR-SNS) pin coupled to a drain of the SR to sense a voltage (V SRD ) thereon, V SRD comprises a sum of V IN divided by a turn ratio (N) of the transformer and a voltage (V BUS ) on the output;

a V BUS voltage-to-current (V2I) converter coupled to the output and to the SR-SNS pin to remove from a voltage (V SR-SNS ) on the SR-SNS pin a component of V SRD arising from VBUS;

a sample and hold (S/H) module coupled to the SR-SNS pin to sample and hold a voltage (V SAMP ) comprising information on V IN and N;

a V IN /N V2I converter coupled to the S/H module to convert V SAMP to a feed-forward current (I FF ) comprising information on V IN /N; and

a N cancellation and signal module coupled to the V IN /N V2I converter to extract from the I FF information on V IN and generate FF signals used by the secondary side controller to control the flyback converter.

11. The system of claim 10 , wherein the SR-SNS pin is one pin of an integrated circuit comprising the V BUS V2I converter, the S/H module, the V IN /N V2I converter and the N cancellation and signal module.

12. The system of claim 10 , wherein the single SR-SNS pin is coupled to the drain of the SR through a voltage divider including elements both internal and external to the IC.

13. The system of claim 12 , wherein the elements of the voltage divider includes an external resistive element (Rext) having a resistance based on V IN and N.

14. The system of claim 13 , wherein the V BUS V2I converter is configured to sink a current (I VBUS ) drawn through Rext to remove from V SR-SNS the component of V SRD arising from V BUS .

15. The system of claim 13 , wherein the V BUS V2I converter is coupled to the SR-SNS pin through the V IN /N V2I converter, and wherein the V BUS V2I converter is configured to subtract from IFF in the V IN /N V2I converter a current substantially equivalent to a current capable of generating VBUS across a resistance equal to Rext.

16. The system of claim 10 , further comprising a DC output compatible with a universal serial bus type C standard (USB-C) connector.

17. A method of operating a secondary side controller for an AC-DC converter, the method comprising:

coupling a voltage (V SRD ) on a drain of a synchronous rectifier (SR) on a secondary side of a transformer in the AC-DC converter to a single synchronous rectifier sense (SR-SNS) pin of the secondary side controller, V SRD comprises a sum of a voltage (V IN ) applied to a primary side of the transformer divided by a turn ratio (N) of the transformer and a voltage (V BUS ) on an output bus coupled to the secondary side;

sensing a voltage (V SR-SNS ) on the SR-SNS pin;

removing from the V SR-SNS on the SR-SNS pin a component of V SRD arising from V BUS ;

sampling and holding a voltage (V SAMP ) coupled from the SR-SNS pin, wherein VSAMP comprises information on V IN /N;

converting V SAMP to a feed-forward current (I FF ) comprising information on V IN /N; and

extracting from the I FF information on V IN and generating FF signals used by the secondary side controller to control the AC-DC converter.

18. The method of claim 17 , wherein the secondary side controller is implemented as an integrated circuit (IC), and wherein the single SR-SNS pin is coupled to the drain of the SR through a voltage divider including elements internal to the IC and an external resistive element (Rext).

19. The method of claim 18 , wherein removing the component of V SRD arising from V BUS comprises sinking a current (I VBUS ) drawn through Rext to remove from V SR-SNS the component of V SRD arising from V BUS .

20. The method of claim 18 , wherein sensing V SR-SNS on the SR-SNS pin comprises converting V SR-SNS to a current substantially equivalent to that necessary to generate V SR-SNS across a resistance equal to Rext, and wherein removing the component of V SRD arising from V BUS comprises subtract from I FF a current substantially equivalent to a current capable of generating V BUS across a resistance equal to Rext.

Assignments (3)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2019
From: GOPALAN, KRISHNAMACHARI
To: COOPER-STANDARD AUTOMOTIVE INC.
Reel/Frame 050694/0603 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 24, 2019
From: MONDAL, PARTHA; VISPUTE, HEMANT P.; KHAMESRA, ARUN; RAI, HARIOM; SHAH, PULKIT
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 050469/0607 →
Cited By (4)
US 12,431,817 US 12,445,042 US 12,455,603 US 12,519,396