Systems and methods for scheduling programs for dedicated execution on a quantum processor
Systems and methods for scheduling usage time for programs that can be executed on a hybrid computing system including a quantum processing unit (QPU) and a central processing unit (CPU). Programs can comprise both QPU-executable tasks and CPU-executable tasks. Some programs can be considered high performance programs that are intolerant of interruptions to QPU-executable tasks and some programs can be considered low performance programs that are tolerant of interruptions to QPU-executable tasks. After a high performance program finishes executing QPU-executable tasks on a QPU, a low performance program may execute QPU-executable tasks on the QPU while the high performance program executes CPU-executable tasks on a CPU. Execution of QPU-executable tasks of a low performance program on a QPU can pause or stop if a high performance program is queued.
1. A method to allocate time on a quantum processing unit (QPU) between one or more programs in a hybrid computing system comprising at least one central processing unit (CPU) of a digital computer and the QPU, the method comprising:
receiving a first program at the QPU from a queue, the first program comprising a plurality of quantum machine instructions (QMIs) and a plurality of CPU-executable instructions;
executing each of the plurality of QMIs of the first program on the QPU;
checking at incremental time durations for completion of execution the plurality of QMIs of the first program on the QPU;
subsequent to completion of the execution of the plurality of QMIs of the first program on the QPU, receiving a second program at the QPU from the queue, the second program comprising a plurality of QMIs and a plurality of CPU-executable instructions;
executing the plurality of CPU-executable instructions of the first program on the CPU of the digital computer while executing on the QPU at least a portion of the plurality of QMIs of the second program;
determining that each CPU-executable instruction of the plurality of CPU-executable instructions of the first program has been executed on the CPU of the digital computer;
in response to the determination that each CPU-executable instruction of the plurality of CPU-executable instructions of the first program has been executed on the CPU of the digital computer, pausing or stopping the execution on the QPU of the at least a portion of QMIs of the plurality of QMIs of the second program; and
preserving a respective state of each QMI of the plurality of QMIs of the second program by preserving results of completed annealing cycles and waveforms of the second program for later resumption.
2. The method of claim 1 , further comprising:
determining if there is at least one additional program in the queue;
for each of a number n of additional programs in the queue,
receiving an i th one of the additional programs at the QPU from the queue;
executing each of a plurality of quantum machine instructions (QMIs) of the i th one of the additional programs on the QPU;
checking at incremental time durations for completion of execution of the plurality of QMIs of the i th one of the additional programs on the QPU;
receiving an (i+1) th one of the additional programs at the QPU from the queue;
executing a plurality of CPU-executable instructions of the i th one of the additional programs on the CPU of the digital computer while executing on the QPU at least a portion of QMIs of a plurality of QMIs of the (i+1) th one of the additional programs; and
preserving a respective state of each QMI of the plurality of QMIs of the (i+1) th one of the additional programs.
3. The method of claim 1 , further comprising:
determining an increment of time of the incremental time durations to be an estimated time for completion of execution of the plurality of QMIs of the first program on the QPU.
4. A hybrid computational system, comprising:
a quantum processing unit (QPU) comprising a plurality of qubits and couplers, the couplers operable to couple qubits;
at least one digital processor in communication with the QPU, the digital processor comprising at least one central processing unit (CPU); and
at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, cause the at least one digital processor to:
cause the QPU to receive a first program from a queue, the first program comprising a plurality of quantum machine instructions (QMIs) and a plurality of CPU-executable instructions;
cause the QPU to execute at least a portion of the plurality of QMIs of the first program for a fixed time duration;
after the fixed time duration, determine whether each QMI of the plurality of QMIs of the first program has been executed;
determine whether to preserve a respective state of each QMI of the plurality of QMIs of the first program based on the determination of whether each QMI of the plurality of QMIs of the first program has been executed;
cause the QPU to receive a second program from the queue, the second program comprising a plurality of QMIs and a plurality of CPU-executable instruction;
subsequent to at least a determination of whether to preserve the respective state of each QMI of the plurality of QMIs of the first program, cause the CPU of the digital processor to execute the plurality of CPU-executable instructions of the first program while causing the QPU to execute at least a portion of QMIs of the plurality of QMIs of the second program;
determine that each CPU-executable instruction of the plurality of CPU-executable instructions of the first program has been executed on the CPU of the digital processor;
in response the determination that each CPU-executable instruction of the plurality of CPU-executable instructions of the first program has been executed on the CPU of the digital processor, pause or stop the execution on the QPU of the at least a portion of QMIs of the plurality of QMIs of the second program; and
preserve a respective state of each QMI of the plurality of QMIs of the second program.
5. The hybrid computational system of claim 4 wherein the at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, further causes the at least one digital processor to:
preserve the respective state of each QMI of the plurality of QMIs of the first program in response to determining to preserve the respective state of each QMI of the plurality of QMIs of the first program based on a determination that at least one QMI of the plurality of QMIs of the first program has not been executed.
6. The hybrid computational system of claim 5 wherein the at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, causes the at least one digital processor to preserve results of one or more completed annealing cycles and waveforms of the first program for later resumption.
7. The hybrid computational system of claim 5 wherein the at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, causes the at least one digital processor to:
after executing the plurality of CPU-executable instructions of the first program on the CPU of the digital processor and while causing the QPU to execute at least a portion of QMIs of the plurality of QMIs of the second program on the QPU, preserve a respective state of each QMI of the plurality of QMIs of the second program; and
after preserving the respective state of each QMI of the plurality of QMIs of the second program, causes the QPU to resume execution of each QMI of the plurality of QMIs of the first program from the preserved state of each QMI of the plurality of QMIs of the first program.
8. The hybrid computational system of claim 4 wherein the at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, causes the at least one digital processor to:
determine if there is at least one additional program in the queue;
for each of a number n of additional programs in the queue,
execute at least a portion of a plurality of quantum machine instructions (QMIs) of an i th one of the additional programs on the QPU for a fixed time duration;
after the fixed time duration, determine whether each QMI of the plurality of QMIs of the i th one of the additional programs has been executed;
determine whether to preserve a respective state of each QMI of the plurality of QMIs of the i th one of the additional programs based on the determination of whether each QMI of the plurality of QMIs of the i th one of the additional programs has been executed;
receive an (i+1) th one of the additional programs at the QPU from the queue; and
execute a plurality of CPU-executable instructions of the i th one of the additional programs on the CPU of the digital processor while causing the QPU to execute at least a portion of QMIs of a plurality of QMIs of the (i+1) th one of the additional programs, where n and i are each integers.
9. The hybrid computational system of claim 4 wherein the at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, further causes the at least one digital processor to:
determine if there is at least one additional program in the queue;
for each of a number n of additional programs in the queue,
cause the QPU to receive an i th one of the additional programs at from the queue;
cause the QPU to execute each of a plurality of QMIs of the i th one of the additional programs;
check at incremental time durations for completion of execution of the plurality of QMIs of the i th one of the additional programs on the QPU;
cause the QPU to receive an (i+1) th one of the additional programs from the queue;
execute a plurality of CPU-executable instructions of the i th one of the additional programs on the CPU of the digital processor while causing the QPU to execute at least a portion of QMIs of a plurality of QMIs of the (i+1) th one of the additional programs; and
preserve a respective state of each QMI of the plurality of QMIs of the (i+1) th one of the additional programs.
10. The hybrid computational system of claim 4 wherein the at least one nontransitory processor-readable storage medium that stores at least one of processor-executable instructions or data which, when executed by the at least one digital processor, further causes the at least one digital processor to:
determine an increment of time of the incremental time durations to be an estimated time for completion of execution of the plurality of QMIs of the first program on the QPU.