IP Library Granted Patent US 11,455,261
Granted Patent B2
US 11,455,261 · App. 16/643,353 · Granted Sep 27, 2022

First boot with one memory channel

Inventors: Kevin Yufu Li (Shanghai, CN); Donggui Yin (Shanghai, CN); Zijian You (Shanghai, CN); Shihui Li (Shanghai, CN); Dujian Wu (Shanghai, CN)
Assignee: Intel Corporation
G06F13/1657G06F9/4406G06F9/4411G06F13/1668G06F13/409G06F13/4068
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Quick Facts
Patent No.
US 11,455,261
App. No.
16/643,353
Granted
Sep 27, 2022
Kind
B2
Abstract

An embodiment of a semiconductor package apparatus may include technology to identify a partial set of populated memory channels from a full set of populated memory channels of a multi-channel memory system, and complete a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system. Other embodiments are disclosed and claimed.

Claims (65)

1. An electronic processing system, comprising:

a processor;

a multi-channel memory system communicatively coupled to the processor; and

logic communicatively coupled to the processor to:

identify a partial set of populated memory channels from a full set of populated memory channels of the multi-channel memory system,

complete a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system, and

online the other populated memory channels of the full set of populated memory channels after the first boot is completed,

wherein to complete the first boot of the operating system with only the identified partial set of memory channels comprises to perform a memory training operation during the first boot based on only the identified partial set of memory channels, and

wherein to online the other populated memory channels of the full set of populated memory channels comprises to perform a memory training operation based on the other populated memory channels.

2. The system of claim 1 , wherein the logic is further to:

identify one memory channel for the partial set of populated memory channels.

3. The system of claim 2 , wherein the logic is further to:

identify a first populated memory channel of the multi-channel memory system as the one memory channel.

4. The system of claim 2 , wherein the logic is further to:

identify a first populated memory channel of the multi-channel memory system with fewer memory components than a threshold as the one memory channel.

5. The system of claim 2 , wherein the logic is further to:

identify a least populated memory channel of the multi-channel memory system as the one memory channel.

6. The system of claim 1 , wherein to online the other populated memory channels of the full set of populated memory channels further comprises to call a basic input output system (BIOS) memory training service.

7. A semiconductor package apparatus, comprising:

a substrate; and

logic coupled to the substrate, wherein the logic is at least partly implemented in one or more of configurable logic and fixed-functionality hardware logic, the logic coupled to the substrate to:

identify a partial set of populated memory channels from a full set of populated memory channels of a multi-channel memory system,

complete a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system, and

online the other populated memory channels of the full set of populated memory channels after the first boot is completed,

wherein to complete the first boot of the operating system with only the identified partial set of memory channels comprises to perform a memory training operation during the first boot based on only the identified partial set of memory channels, and

wherein to online the other populated memory channels of the full set of populated memory channels comprises to perform a memory training operation based on the other populated memory channels.

8. The apparatus of claim 7 , wherein the logic is further to:

identify one memory channel for the partial set of populated memory channels.

9. The apparatus of claim 8 , wherein the logic is further to:

identify a first populated memory channel of the multi-channel memory system as the one memory channel.

10. The apparatus of claim 8 , wherein the logic is further to:

identify a first populated memory channel of the multi-channel memory system with fewer memory components than a threshold as the one memory channel.

11. The apparatus of claim 8 , wherein the logic is further to:

identify a least populated memory channel of the multi-channel memory system as the one memory channel.

12. The apparatus of claim 7 , wherein to online the other populated memory channels of the full set of populated memory channels further comprises to call a basic input output system (BIOS) memory training service.

13. A method of booting an operating system, comprising:

identifying a partial set of populated memory channels from a full set of populated memory channels of a multi-channel memory system;

completing a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system; and

onlining the other populated memory channels of the full set of populated memory channels after the first boot is completed,

wherein completing the first boot of the operating system with only the identified partial set of memory channels comprises performing a memory training operation during the first boot based on only the identified partial set of memory channels, and

wherein onlining the other populated memory channels of the full set of populated memory channels comprises performing a memory training operation based on the other populated memory channels.

14. The method of claim 13 , further comprising:

identifying one memory channel for the partial set of populated memory channels.

15. The method of claim 14 , further comprising:

identifying a first populated memory channel of the multi-channel memory system as the one memory channel.

16. The method of claim 14 , further comprising:

identifying a first populated memory channel of the multi-channel memory system with fewer memory components than a threshold as the one memory channel.

17. The method of claim 14 , further comprising:

identifying a least populated memory channel of the multi-channel memory system as the one memory channel.

18. The method of claim 13 , wherein onlining the other populated memory channels of the full set of populated memory channels further comprises calling a basic input output system (BIOS) memory training service.

19. At least one non-transitory computer readable medium, comprising a set of instructions, which when executed by a computing device, cause the computing device to:

identify a partial set of populated memory channels from a full set of populated memory channels of a multi-channel memory system;

complete a first boot of an operating system with only the identified partial set of memory channels of the multi-channel memory system; and

online the other populated memory channels of the full set of populated memory channels after the first boot is completed,

wherein to complete the first boot of the operating system with only the identified partial set of memory channels comprises to perform a memory training operation during the first boot based on only the identified partial set of memory channels, and

wherein to online the other populated memory channels of the full set of populated memory channels comprises to perform a memory training operation based on the other populated memory channels.

20. The at least one non-transitory computer readable medium of claim 19 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

identify one memory channel for the partial set of populated memory channels.

21. The at least one non-transitory computer readable medium of claim 20 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

identify a first populated memory channel of the multi-channel memory system as the one memory channel.

22. The at least one non-transitory computer readable medium of claim 20 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

identify a first populated memory channel of the multi-channel memory system with fewer memory components than a threshold as the one memory channel.

23. The at least one non-transitory computer readable medium of claim 20 , comprising a further set of instructions, which when executed by the computing device, cause the computing device to:

identify a least populated memory channel of the multi-channel memory system as the one memory channel.

24. The at least one non-transitory computer readable medium of claim 19 , wherein to online the other populated memory channels of the full set of populated memory channels further comprises to call a basic input output system (BIOS) memory training service.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072549/0402 →
Continuity (1)
Related Publication 20200364162A1 · Nov 19, 2020
Cited By (1)
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