Method for producing an optoelectronic semiconductor chip having structures at the radiation passage surface, and optoelectronic semiconductor chip having structures at the radiation passage surface
The invention relates to a method for producing an optoelectronic semiconductor chip comprising the following steps: providing a semiconductor body ( 1 ) having a radiation-permeable surface ( 1 a ), and introducing structures ( 2 ) into the semiconductor body ( 1 ) on the radiation-permeable surface ( 1 a ), wherein the structures ( 2 ) are quasi-regular.
1. A method for producing an optoelectronic semiconductor chip;
wherein the method comprises:
providing a semiconductor body having a radiation passage surface, and
introducing structures into the semiconductor body at the radiation passage surface, and/or applying structures to the semiconductor body at the radiation passage surface, and/or exposing structures in the semiconductor body at the radiation passage surface,
wherein:
the structures are arranged in quasi-regular fashion;
positions of at least some of the structures are displaced in comparison with positions of structures at lattice points of a regular lattice, and said positions are arranged by a predefined maximum displacement value at a higher frequency than by a smaller displacement value where the smaller displacement value is greater than zero;
the structures are domes, elevations, or combinations thereof; and
each structure has a vertex where the position of each structure is given by the position of its vertex.
2. The method of claim 1 ,
wherein the maximum value is at least 10% of the average distance between mutually adjacent lattice points of the regular lattice.
3. The method as claimed in claim 1 ,
wherein the positions are displaced in each lateral direction with the same frequency.
4. The method of claim 1 ,
further comprising forming the structures by dry-chemical etching using a correspondingly structured mask.
5. The method of claim 1 ,
further comprising forming the structures by wet-chemical etching using a correspondingly structured mask.
6. The method of claim 1 ,
wherein the structures have a refractive index less than the refractive index of a region of the semiconductor body that directly adjoins the structures, and wherein the structures have a refractive index greater than the refractive index of a material surrounding the semiconductor body.
7. The method of claim 1 ,
wherein the height and/or the maximum diameter and/or the volume are/is different in pairs for at least some of the structures.
8. The method of claim 1 ,
wherein the height and/or the maximum diameter and/or the volume, for at least some of the structures, deviate(s) by at least 1% from an average value of the height and/or the maximum diameter and/or the volume.
9. The method of claim 1 ,
wherein at least some of the structures are covered with an antireflective layer.
10. The method of claim 1 ,
wherein at least some of the structures have a roughened outer surface only in the region of the vertex.
11. The method as claimed in claim 1 , wherein the smaller displacement value is at least half of the maximum displacement value.
12. An optoelectronic semiconductor chip comprising:
a semiconductor body comprising a radiation passage surface and structures at the radiation passage surface,
wherein:
the structures are arranged in quasi-regular fashion; and
positions of at least some of the structures are displaced in comparison with positions of structures at lattice points of a regular lattice, and said positions are arranged by a predefined maximum displacement value at a higher frequency than by a smaller displacement value where the smaller displacement value is greater than zero; and
the structures are domes, elevations, or combinations thereof; and
each structure has a vertex where the position of each structure is given by the position of its vertex.
13. The optoelectronic semiconductor chip of claim 12 , wherein the maximum value is at least 10% of the average distance between mutually adjacent lattice points of the regular lattice.
14. The optoelectronic semiconductor chip of claim 12 , wherein the positions are displaced in each lateral direction with the same frequency.
15. The optoelectronic semiconductor chip of claim 12 , further comprising forming the structures by dry-chemical etching using a correspondingly structured mask.
16. The optoelectronic semiconductor chip of claim 12 , further comprising forming the structures by wet-chemical etching using a correspondingly structured mask.
17. The optoelectronic semiconductor chip of claim 12 , wherein the smaller displacement value is at least half of the maximum displacement value.