Forward error correction using non-binary low density parity check codes
Methods, systems and devices for forward error correction in orthogonal time frequency space (OTFS) communication systems using non-binary low-density parity-check (NB-LDPC) codes are described. One exemplary method for forward error correction includes receiving data, encoding the data via a non-binary low density parity check (NB-LDPC) code, wherein the NB-LDPC code is characterized by a matrix with binary and non-binary entries, modulating the encoded data to generate a signal, and transmitting the signal. Another exemplary method for forward error correction includes receiving a signal, demodulating the received signal to produce data, decoding the data via a NB-LDPC code, wherein the NB-LDPC code is characterized by a matrix with binary and non-binary entries, and providing the decoded data to a data sink.
1. A method for forward error correction performed at a receiver, comprising:
receiving, over a channel, a signal that is modulated using an orthogonal time frequency space (OTFS) modulation scheme;
demodulating the signal to produce data;
decoding the data, via a non-binary low density parity check (NB-LDPC) code, by formulating the NB-LDPC code as a matrix with binary and non-binary entries; and
providing an output of the decoding to a data sink,
wherein a parity matrix H for the NB-LDPC code is based on a binary H matrix, and
wherein the binary H matrix is based on a computer search algorithm configured to add offsets to entries in a first column and entries in a first row of the binary H matrix such that the first column and the first row contain only identity elements.
2. The method of claim 1 , wherein the NB-LDPC code comprises a structured regular systematic repeat accumulate code over a non-binary field.
3. The method of claim 2 , wherein the parity matrix H for the NB-LDPC code comprises a non-binary matrix generated from the binary H matrix.
4. The method of claim 3 , wherein the computer search algorithm is further configured to:
terminate upon a determination that no N-cycles are present in a Tanner graph representation of the binary H matrix, and wherein N=4 or N=6.
5. The method of claim 3 , wherein the parity check matrix H is represented as H=[H 1 , H 2 ], where H 1 is the parity part and H 2 is the systematic part, wherein both H 1 and H 2 are composed of blocks of circulant permutation matrices and zero matrices of block size Q, where Q is an integer.
6. The method of claim 1 , wherein the demodulating the received signal to produce data includes operating a slicer and a log likelihood ratio (LLR) computer on intermediate data generated from the received signal.
7. The method of claim 6 , wherein the LLR computer is either a symbol-wise LLR computer or a bit-wise LLR computer.
8. The method of claim 7 , wherein the symbol-wise LLR computer calculates LLR for a LDPC symbol s (c) =x 1 x 2 . . . x c using:
LLR
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where P is a probability function, i is an integer, c is an integer number of consecutive bits of a constellation in the signal modulated using the OTFS modulation scheme, and x and y represent transmitted and received constellation points, respectively.
9. The method of claim 1 , wherein the decoding the data includes performing decoding using either a flooding type algorithm or a layered algorithm.
10. The method of claim 1 , wherein the receiving the signal includes receiving a radio frequency signal over the air, receiving the radio frequency signal over a wire, or receiving an optical signal over a fiber optic cable.
11. A non-transitory computer-readable storage medium having code stored thereon, the code comprising instructions, when executed, causing a processor to implement a method for forward error correction, comprising:
instructions for receiving, over a channel, a signal that is modulated using an orthogonal time frequency space (OTFS) modulation scheme;
instructions for demodulating the signal to produce data;
instructions for decoding the data, via a non-binary low density parity check (NB-LDPC) code, by formulating the NB-LDPC code as a matrix with binary and non-binary entries; and
instructions for providing an output of the decoding to a data sink,
wherein a parity matrix H for the NB-LDPC code is based on a binary H matrix, and
wherein the binary H matrix is based on a computer search algorithm configured to add offsets to entries in a first column and entries in a first row of the binary H matrix such that the first column and the first row contain only identity elements.
12. The storage medium of claim 11 , wherein the NB-LDPC code comprises a structured regular systematic repeat accumulate code over a non-binary field, and wherein the parity matrix H for the NB-LDPC code comprises a non-binary matrix generated from the binary H matrix.
13. The storage medium of claim 11 , wherein the instructions for demodulating the signal comprises:
instructions for operating a slicer and a log likelihood ratio (LLR) computer on intermediate data generated from the signal.
14. The storage medium of claim 13 , wherein the LLR computer is either a symbol-wise LLR computer or a bit-wise LLR computer.
15. An apparatus for forward error correction performed at a receiver, comprising:
a reception circuit configured to receive, over a channel, a signal that is modulated using an orthogonal time frequency space (OTFS) modulation scheme; and
a processor, coupled to the reception circuit, configured to:
demodulate the signal to produce data,
decode the data, via a non-binary low density parity check (NB-LDPC) code, by formulating the NB-LDPC code as a matrix with binary and non-binary entries, and
provide an output of the decoding to a data sink,
wherein a parity matrix H for the NB-LDPC code is based on a binary H matrix, and wherein the binary H matrix is based on a computer search algorithm configured to add offsets to entries in a first column and entries in a first row of the binary H matrix such that the first column and the first row contain only identity elements.
16. The apparatus of claim 15 , wherein the NB-LDPC code comprises a structured regular systematic repeat accumulate code over a non-binary field, and wherein the parity matrix H for the NB-LDPC code comprises a non-binary matrix generated from the binary H matrix.
17. The apparatus of claim 15 , wherein the processor is configured, as part of demodulating the signal, to:
operate a slicer and a log likelihood ratio (LLR) computer on intermediate data generated from the signal.
18. The apparatus of claim 17 , wherein the LLR computer is either a symbol-wise LLR computer or a bit-wise LLR computer.
19. The apparatus of claim 15 , wherein the decoding the data includes performing decoding using either a flooding type algorithm or a layered algorithm.