Methods of manufacturing optoelectronic devices using different growth substrates
A growth structure having a lattice transition (or graded buffer) or an engineered growth structure with a desired lattice constant, different from a lattice constant of conventional substrates like GaAs, Si, Ge, InP, under a release layer or an etch stop layer is used as a seed crystal for growing optoelectronic devices. The optoelectronic device can be a photovoltaic device having one or more subcells (e.g., lattice-matched or lattice-mismatched subcells). The release layer can be removed using different processes to separate the optoelectronic device from the growth structure, which may be reused, or from the engineered growth structure. When using the etch stop layer, the growth structure or the engineered growth structure may be grinded or etched away. The engineered growth structure may be made from a layer transfer process between two wafers or from a ternary and/or a quaternary material. Methods for making the optoelectronic device are also described.
1. A method of manufacturing an optoelectronic device, the method comprising:
providing a growth structure having a substrate with a lattice transition from a first lattice constant to a second lattice constant having a relaxed lattice constant or an engineered growth structure with lattice constant different than typical conventional single or binary element substrates;
depositing an epitaxial layer over the growth structure or on the engineered growth structure, the epitaxial layer including one or more subcells that form the optoelectronic device, each subcell including at least one pn junction, and the subcells being lattice matched to the second lattice constant of the growth structure; and
separating the epitaxial layer with the optoelectronic device from the growth structure or the engineered growth structure,
wherein the conventional single or binary element substrates include Ge, Si, InP, and GaAs substrates.
2. The method of claim 1 , wherein:
the second lattice constant ranges from a lattice constant of GaAs (5.65 Å) to a lattice constant of InP (5.87 Å), or
the second lattice constant ranges from a lattice constant of GaP (5.45 Å) to a lattice constant of GaAs (5.65 Å).
3. The method of claim 1 , wherein being lattice matched includes bulk epitaxial layers with thickness greater than 300 nanometers and with a lattice mismatch that is less than 500 arc-seconds.
4. The method of claim 1 , wherein the growth structure includes a buffer layer disposed over a graded layer, the method further comprising depositing a release layer over the buffer layer, and separating the epitaxial layer from the growth structure includes removing the release layer.
5. The method of claim 4 , wherein the buffer layer includes an overshoot layer to provide the relaxed lattice constant before depositing the epitaxial layer, the overshoot layer having a greater lattice constant than layers underneath and above the overshoot layer.
6. The method of claim 1 , further comprising depositing a release layer over the growth structure, the epitaxial layer being deposited over the release layer.
7. The method of claim 6 , wherein:
the release layer includes an aluminum-containing compound, the aluminum-containing compound is one of AlAs, AlGaAs, (Al)InGaAs, AlInP, AlInGaP, or AlInAs, and wherein the aluminum-containing compound is susceptible to etching by hydrofluoric acid (HF), or
the release layer includes graphene.
8. The method of claim 6 , wherein separating the epitaxial layer from the growth structure or the engineered growth structure includes removing the release layer by one of an epitaxial lift-off (ELO) process, a laser lift-off process, spalling, or a combination thereof.
9. The method of claim 1 , wherein:
the optoelectronic device is a single-junction photovoltaic device, and
the one or more subcells include a single subcell.
10. The method of claim 1 , wherein the first lattice constant is about 5.655+/−0.005 Å or 5.65+/−0.01 Å, and the second lattice constant is in the range of 5.661 Å to 5.89 Å, the second lattice constant being based on the number of junctions in the optoelectronic device.
11. The method of claim 1 , further comprising depositing an etch stop layer over the growth structure, the epitaxial layer being deposited over the etch stop layer.
12. The method of claim 11 , wherein the etch stop layer is selected such that it can be selectively wet-etched from its adjacent layers.
13. The method of claim 11 , wherein:
the etch stop layer is made of InGaP, and
the etch stop layer is made of at least one layer.
14. The method of claim 11 , wherein separating the epitaxial layer from the growth structure includes removing at least a portion of the growth structure through one or more of etching, polishing, grinding, or spalling, or graphene as the release layer, such removal being limited from encroaching the epitaxial layer by the etch stop layer.
15. The method of claim 1 , wherein the substrate of the growth structure includes a Group III-V semiconductor material.
16. The method of claim 15 , wherein the Group III-V semiconductor material is GaAs.
17. The method of claim 1 , wherein:
the growth structure includes a graded layer that provides the transition from the first lattice constant to the second lattice constant, and wherein the graded layer is a compositionally graded buffer,
the compositionally graded buffer includes InGaAs, AlInGaAs, InGaP, or GaAsP or SiGe, and
the transition from the first lattice constant to the second lattice constant in the compositionally graded buffer is achieved by respectively changing the stoichiometry of the InGaAs, the AlInGaAs, the InGaP, the GaAsP, or the SiGe.
18. The method of claim 1 , wherein the optoelectronic device is a metamorphic device having a first subcell of the one or more subcells lattice matched to the growth structure underneath and subsequent subcells of the one or more subcells are lattice mismatched internally to each other and to the growth structure.
19. The method of claim 1 , wherein the growth structure is an engineered growth structure made from a layer transfer process between two wafers of disparate materials or from a ternary material and/or a quaternary material.
20. The method of claim 1 , wherein any of the one or more subcells of the epitaxial layer is made using one or more of the following processes:
a metalorganic chemical vapor deposition (MOCVD) process,
a hydride vapor phase epitaxy (HVPE) process,
a molecular beam epitaxy (MBE) process,
a metalorganic vapor phase epitaxy (MOVPE or OMVPE) process,
a liquid phase epitaxy (LPE) process,
a close-space vapor transport (CSVT) epitaxy process,
a plasma enhanced chemical vapor deposition (PECVD) process,
a physical vapor deposition (PVD) process,
an atmospheric pressure chemical vapor deposition (APCVD) process,
an atomic layer deposition (ALD) process,
a low pressure chemical vapor deposition (LPCVD) process,
a hot-wire chemical vapor deposition (HWCVD) process,
an inductively coupled plasma enhanced chemical vapor deposition (ICP-CVD) process, or
other forms of CVD.
21. A method of manufacturing an optoelectronic device, the method comprising:
providing an engineered growth structure having a substrate and a relaxed lattice constant, the engineered growth structure being made from a layer transfer process between two wafers of disparate materials or from a ternary material and/or a quaternary material that produces the relaxed lattice constant;
depositing a release layer or an etch stop layer on the engineered growth structure;
depositing an epitaxial layer on the release layer or the etch stop layer, the epitaxial layer including one or more subcells that form the optoelectronic device, each subcell including at least one pn junction, and the subcells being lattice matched to the relaxed lattice constant of the engineered growth structure; and
if the release layer is deposited, removing the release layer to separate the epitaxial layer with the optoelectronic device from the engineered growth structure, or
if the etch stop is deposited, grinding or etching away the engineered growth structure to separate the epitaxial layer with the optoelectronic device from the engineered growth structure.
22. The method of claim 21 , wherein:
the ternary material is made of a combination of three elements from In, Ga, Al, As, P, N, B, Bi, and Sb, and
the quaternary material is made of a combination of four elements from In, Ga, Al, As, P, N, B, Bi, and Sb.
23. The method of claim 21 , wherein:
the relaxed lattice constant of the engineered growth structure ranges from a lattice constant of GaAs (5.65 Å) to a lattice constant of InP (5.87 Å),
the relaxed lattice constant of the engineered growth structure is greater than a lattice constant of GaP (5.45 Å), or
the relaxed lattice constant of the engineered growth structure ranges from a lattice constant of GaP (5.45 Å) to a lattice constant of GaAs (5.65 Å).
24. The method of claim 21 , wherein the substrate of the engineered growth structure is made of InGaAs, AlInGaAs, InGaP, or GaAsP or GaAsSb or GaAsBi.
25. The method of claim 21 , wherein:
the one or more subcells includes a first subcell, a second subcell, and a third subcell, all of which are internally matched within the epitaxial layer,
the first subcell is made of GaInP or AlGaInP,
the second subcell is made of GaAsP or AlGaAsP,
the third subcell is made of SiGe or SiGeSn,
the substrate of the engineered growth structure is a ternary substrate made of GaAsP or GaInP and having a lattice constant ranging between the lattice constant of GaP and the lattice constant of GaAs.