Barrier stacks for printed and/or thin film electronics, methods of manufacturing the same, and method of controlling a threshold voltage of a thin film transistor
The present disclosure pertains to a barrier stack for thin film and/or printed electronics on substrates having a diffusible element and/or species, methods of manufacturing the same, and methods of inhibiting or preventing diffusion of a diffusible element or species in a substrate using the same. The barrier stack includes a first barrier layer on the substrate, an insulator layer on the first barrier layer, a second barrier layer on the insulator layer in a first region of the substrate, and a third barrier layer on the insulator layer in a second region of the substrate and on the second barrier layer in the first region. Each of the second and third barrier layers has a thickness less than that of the first barrier layer.
1. A method of manufacturing a barrier stack, comprising:
forming, in sequence, on a substrate comprising a metal foil and containing a diffusible element and/or species, a first barrier layer, an insulator layer, and a second barrier layer, wherein the second barrier layer has an original thickness less than the first barrier layer;
forming a blocking mask in one or more first regions of the substrate; and
thinning the second barrier layer in the one or more first regions of the substrate without thinning the second barrier layer in one or more second regions of the substrate, wherein the second barrier layer in the one or more first regions of the substrate has a final thickness that is 5 to 75% of the original thickness after thinning.
2. The method of claim 1 , wherein the insulator layer comprises an SiO 2 , Al 2 O 3 , or an aluminosilicate, any of which may be doped with boron and/or phosphorus.
3. The method of claim 1 , wherein the first barrier layer, the insulator layer, and the second barrier layer are formed using blanket deposition.
4. The method of claim 1 , wherein the first barrier layer and the second barrier layer independently comprise AlN, TiN, TiAlN, WN, or TiWN.
5. The method of claim 1 , wherein the insulator layer comprises an SiO 2 , Al 2 O 3 , or an aluminosilicate, any of which may be doped with boron and/or phosphorus.
6. The method of claim 1 , wherein the insulator layer has a thickness of from 2000 to 15,000 Å, the first barrier layer has a thickness of from 500 to 2000 Å, and the second barrier layer has a thickness of from 100 to 500 Å.
7. The method of claim 1 , wherein the metal foil comprises stainless steel, copper, aluminum, or titanium.
8. The method of claim 7 , wherein the first barrier layer and the second barrier layer independently comprise AlN, TiN, TiAlN, WN, or TiWN.
9. The method of claim 8 , wherein the insulator layer comprises an SiO 2 , Al 2 O 3 , or an aluminosilicate, any of which may be doped with boron and/or phosphorus.
10. The method of claim 9 , wherein the insulator layer has a thickness of from 2000 to 15,000 Å, the first barrier layer has a thickness of from 500 to 2000 Å, and the second barrier layer has a thickness of from 100 to 500 Å.