IP Library Granted Patent US 10,943,663
Granted Patent B1
US 10,943,663 · App. 16/660,773 · Granted Mar 9, 2021

Method of programming in flash memory devices

Inventors: Yu Wang (Wuhan, CN); Shuang Li (Wuhan, CN); Khanh Nguyen (Wuhan, CN); Chunyuan Hou (Wuhan, CN); Qiang Tang (Wuhan, CN)
Assignee: Yangtze Memory Technologies Co., Ltd.
G11C16/12G11C11/5628G11C16/08G11C16/3459
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Quick Facts
Patent No.
US 10,943,663
App. No.
16/660,773
Granted
Mar 9, 2021
Kind
B1
Abstract

A method of programming a flash memory device includes selecting a first wordline of a plurality of wordlines to select a selected wordline, the selected wordline corresponding to a target memory cell and performing a programming loop. The programming loop includes applying a program voltage to the selected wordline and performing a verification to the target memory cell. The verification includes applying a pre-pulse voltage to the selected wordline, applying a plurality of pass voltages to unselected wordlines of the plurality of wordlines, after applying the pre-pulse voltage, applying a series of incremental verifying voltages to the selected wordline, and after applying the pre-pulse voltage, applying a floating voltage to a second wordline of the plurality of wordlines. The second wordline being adjacent to the selected wordline is programmed after the selected wordline.

Claims (41)

1. A method of programming a flash memory device, comprising:

selecting a first wordline of a plurality of wordlines to select a selected wordline, the selected wordline corresponding to a target memory cell; and

performing a programming loop comprising:

applying a program voltage to the selected wordline; and

performing a verification to the target memory cell, the verification comprising:

applying a pre-pulse voltage to the selected wordline;

applying a plurality of pass voltages to unselected wordlines of the plurality of wordlines;

after applying the pre-pulse voltage, applying a series of incremental verifying voltages to the selected wordline; and

after applying the pre-pulse voltage, applying a floating voltage to a second wordline of the plurality of wordlines, the second wordline being adjacent to the selected wordline which is programmed after the selected wordline.

2. The method of claim 1 , the programming loop further comprising discharging each of the plurality of wordlines after the verification.

3. The method of claim 1 , the programming loop further comprising ending the programming loop if a number of memory cells having threshold voltages greater than target voltages is greater than a predetermined number.

4. The method of claim 1 , the programming loop further comprising increasing the program voltage.

5. The method of claim 1 further comprising ending the programming loop if a programming loop count reaches a maximum loop count.

6. A method of programming a flash memory device, comprising:

selecting a first wordline of a plurality of wordlines to select a selected wordline, the selected wordline corresponding to a target memory cell; and

performing a programming loop comprising:

applying a program voltage to the selected wordline; and

performing a verification to the target memory cell, the verification comprising:

applying a pre-pulse voltage to the selected wordline;

applying a plurality of pass voltages to unselected wordlines of the plurality of wordlines;

after applying the pre-pulse voltage, applying a series of incremental verifying voltages to the selected wordline; and

after applying the pre-pulse voltage, discharging a second wordline of the plurality of wordlines to a system voltage level, the second wordline being adjacent to the selected wordline which is programmed after the selected wordline; and

after discharging the second wordline to the system voltage level, applying a floating voltage to the second wordline.

7. The method of claim 6 , the programming loop further comprising discharging each of the plurality of wordlines after the verification.

8. The method of claim 6 , the programming loop further comprising ending the programming loop if a number of memory cells having threshold voltages greater than target voltages is greater than a predetermined number.

9. The method of claim 6 , the programming loop further comprising increasing the program voltage.

10. The method of claim 6 further comprising ending the programming loop if a programming loop count reaches a maximum loop count.

11. A method of programming a flash memory device, comprising:

selecting a first wordline of a plurality of wordlines to select a selected wordline, the selected wordline corresponding to a target memory cell; and

performing a programming loop comprising:

applying a program voltage to the selected wordline; and

performing a verification to the target memory cell, the verification comprising:

applying a pre-pulse voltage to the selected wordline;

applying a plurality of pass voltages to unselected wordlines of the plurality of wordlines;

after applying the pre-pulse voltage, applying a series of incremental verifying voltages to the selected wordline; and

after applying the pre-pulse voltage, discharging a second wordline of the plurality of wordlines to a ground voltage level, the second wordline adjacent to the selected wordline and on a side of the selected wordline nearest a bitline transistor; and

after discharging the second wordline to the ground voltage level, applying a floating voltage to the second wordline.

12. The method of claim 11 , the programming loop further comprising discharging each of the plurality of wordlines after the verification.

13. The method of claim 11 , the programming loop further comprising ending the programming loop if a number of memory cells having threshold voltages greater than target voltages is greater than a predetermined number.

14. The method of claim 11 , the programming loop further comprising increasing the program voltage.

15. The method of claim 11 further comprising ending the programming loop if a programming loop count reaches a maximum loop count.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2019
From: WANG, YU; LI, SHUANG; NGUYEN, KHANH; HOU, CHUNYUAN; TANG, QIANG
To: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Reel/Frame 050796/0256 →
Continuity (1)
Continuation PCTCN2019102969 · Aug 28, 2019
Cited By (1)
US 12,315,577