SYSTEMS AND METHODS FOR ELECTRICAL CHARGE DISSIPATION
A system and method of charge dissipation by embedded metal connection that includes an image sensor is disclosed. Specific implementations include a semiconductor substrate, an antireflective coating (ARC) layer coupled over the semiconductor substrate, a charge dissipation structure included within the ARC layer, and a passivation layer coupled over the ARC layer.
1 . An image sensor comprising:
a semiconductor substrate;
an antireflective coating (ARC) layer coupled over the semiconductor substrate;
a charge dissipation structure comprised within the ARC layer; and
a passivation layer coupled over the ARC layer.
2 . The image sensor of claim 1 , further comprising a color filter array coupled over the passivation layer.
3 . The image sensor of claim 2 , further comprising a plurality of lenses coupled over the color filter array.
4 . The image sensor of claim 1 , further comprising a hafnium oxide layer coupled over the ARC layer.
5 . The image sensor of claim 1 , further comprising one of a backside deep trench isolation structure or a frontside deep trench isolation structure comprised within the semiconductor substrate.
6 . The image sensor of claim 1 , wherein the charge dissipation structure comprises an electrically conductive metal.
7 . The image sensor of claim 6 , wherein the electrically conductive metal is configured to collect electrostatic charges and to direct the electrostatic charges to a ground.
8 . The image sensor of claim 1 , wherein the charge dissipation structure comprises a grid.
9 . The image sensor of claim 1 , wherein the charge dissipation structure comprises a plurality of substantially parallel bars.
10 . The image sensor of claim 1 , wherein at least a portion of the charge dissipation structure contacts a grounded pad.
11 . A method of forming an image sensor, comprising:
providing a semiconductor substrate;
forming an antireflective coating (ARC) layer over the semiconductor substrate;
patterning the ARC layer to form a plurality of trenches therein;
forming a charge dissipation layer into the plurality of trenches;
etching a pixel array area into the charge dissipation layer; and
forming a passivation layer over the ARC layer.
12 . The method of claim 11 , further comprising forming a color filter array over the passivation layer.
13 . The method of claim 12 , further comprising forming a plurality of lenses over the color filter array.
14 . The method of claim 11 , further comprising:
forming a hafnium oxide layer over the ARC layer; and
using the hafnium oxide layer as an etch stop during etching the pixel array area into the charge dissipation layer.
15 . The method of claim 11 , further comprising:
etching a plurality of trenches in the semiconductor substrate; and
filling each trench of the plurality of trenches with one of a polysilicon or an electrically conductive material to form one of a backside deep trench isolation structure or a frontside deep trench isolation structure.
16 . The method of claim 15 , wherein the ARC layer comprises at least a second layer coupled over a first layer and further comprising extending one or more trenches of the plurality of trenches entirely through the first layer of the ARC layer.
17 . A method of forming an image sensor, comprising:
providing a semiconductor substrate;
forming an antireflective coating (ARC) layer over the semiconductor substrate;
forming an etch stop layer over the ARC layer;
patterning the ARC layer to form a plurality of trenches therein;
forming a charge dissipation layer into the plurality of trenches;
etching a pixel array area into the charge dissipation layer; and
forming a passivation layer over the ARC layer.
18 . The method of claim 17 , further comprising:
forming a color filter array over the passivation layer; and
forming a plurality of lenses over the color filter array.
19 . The method of claim 17 , further comprising:
etching a plurality of trenches in the semiconductor substrate; and
filling each trench of the plurality of trenches with one of a polysilicon or an electrically conductive material to form one of a backside deep trench isolation structure or a frontside deep trench isolation structure.
20 . The method of claim 19 , wherein the ARC layer comprises at least a second layer coupled over a first layer and further comprising extending one or more trenches of the plurality of trenches entirely through the first layer of the ARC layer.