Semiconductor device having a vertical hall element with a buried layer
A semiconductor devices has a vertical Hall element formed on a semiconductor substrate, the vertical Hall element including a semiconductor layer of a second conductivity type formed above the semiconductor substrate; an impurity diffusion layer of the second conductivity type formed in an upper portion of the semiconductor layer and having a concentration higher than that of the semiconductor layer; a plurality of electrodes formed on a surface of the impurity diffusion layer, arrayed in a straight line, and each formed from an impurity region of the second conductivity type; a plurality of electrode isolation diffusion layers of the first conductivity type each formed between two adjacent electrodes; and a buried layer formed between the semiconductor substrate and the semiconductor layer, and having a concentration higher than that of the semiconductor layer and lower than that of the impurity diffusion layer.
1. A semiconductor device, comprising:
a semiconductor substrate of a first conductivity type; and
a vertical Hall element formed on the semiconductor substrate,
the vertical Hall element comprising:
a semiconductor layer of a second conductivity type provided above the semiconductor substrate;
an impurity diffusion layer of the second conductivity type formed in an upper portion of the semiconductor layer and having an impurity concentration higher than an impurity concentration of the semiconductor layer;
a plurality of electrodes formed on a surface of the impurity diffusion layer, arrayed in a straight line, and each formed from an impurity region of the second conductivity type, the impurity region having an impurity concentration higher than the impurity concentration of the impurity diffusion layer;
a plurality of electrode isolation diffusion layers of the first conductivity type each formed between two adjacent electrodes, to isolate the plurality of electrodes from one another; and
a buried layer of the second conductivity type formed between the semiconductor substrate and the semiconductor layer, and having an impurity concentration higher than the impurity concentration of the semiconductor layer and lower than the impurity concentration of the impurity diffusion layer.
2. The semiconductor device according to claim 1 , wherein the buried layer comprises a plurality of buried layers located substantially immediately below the plurality of electrode isolation diffusion layers, respectively, and each of which is separated from one another.
3. The semiconductor device according to claim 1 , wherein the impurity diffusion layer comprises a plurality of impurity diffusion layers formed around the plurality of electrodes, respectively, and each of which is separated from one another.
4. The semiconductor device according to claim 1 , wherein each of the plurality of electrode isolation diffusion layers is surrounded by a depletion layer, and lowermost parts of the depletion layers are positioned at substantially the same level as a top surface of the semiconductor layer.
5. The semiconductor device according to claim 1 , wherein the impurity diffusion layer has an impurity concentration distribution in which the impurity concentration decreases as a distance from the surface to the semiconductor layer increases.
6. The semiconductor device according to claim 1 , wherein the semiconductor layer and the impurity diffusion layer comprise an epitaxial layer.
7. The semiconductor device according to claim 1 , wherein the surface of the impurity diffusion layer and surfaces of the plurality of electrode isolation diffusion layers are covered with an insulating film, except for regions in which the plurality of electrodes is formed.
8. The semiconductor device according to claim 1 , wherein a number of the plurality of electrodes is at least three.