IP Library Granted Patent US 11,424,727
Granted Patent B2
US 11,424,727 · App. 16/668,557 · Granted Aug 23, 2022

Gain-control circuit and method for instrumentation amplifiers

Inventors: Cornel D. Stanescu (Bucharest, RO); Cristian Marian Dinca (Bucharest, RO); Gerald William Steele (Tucson, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03G3/30H03F3/45475H03F2200/129H03F2200/261H03F2203/45116H03F2203/45526
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Quick Facts
Patent No.
US 11,424,727
App. No.
16/668,557
Granted
Aug 23, 2022
Kind
B2
Abstract

An instrumentation amplifier with an electronically adjustable gain is disclosed. The gain is adjusted by electronically controlling a resistance coupled to a feedback portion of the instrumentation amplifier. The resistance is adjusted by switches controlled by resistor-control signals references to a common mode voltage appearing at the input of the instrumentation amplifier. Accordingly, the instrumentation amplifier is capable of accommodating a high voltage range of common mode voltages while still providing controllable gain.

Claims (54)

1. A circuit, comprising:

an instrumentation amplifier; and

a gain-control circuit coupled to the instrumentation amplifier that includes:

a common-mode extractor circuit coupled to a positive input and a negative input of the instrumentation amplifier and configured to output a common mode voltage;

a gain decoder circuit configured to output a plurality of resistor-control signals based, in part, on the common mode voltage from the common-mode extractor circuit; and

an inner controlled resistor circuit configured to generate a resistance according to the plurality of resistor-control signals from the gain decoder circuit, the resistance coupled to the instrumentation amplifier.

2. The circuit according to claim 1 , wherein:

the inner controlled resistor circuit includes a bank of resistors, a gain of the instrumentation amplifier corresponding to a resistance of the bank of resistors; and

the gain decoder circuit is configured to output the plurality of resistor-control signals to based on the common mode voltage from the common-mode extractor circuit and on gain-selection signals at a plurality of gain-selection inputs to the gain decoder circuit.

3. The circuit according to claim 2 , wherein:

the instrumentation amplifier is powered by a negative supply voltage (V SS ) and a positive supply voltage (V DD );

each of the plurality of gain-selection inputs receives gain-selection signals of either V SS or V DD to define a particular gain-selection combination of voltages across the plurality of gain-selection inputs; and

the gain decoder circuit is configured to output a particular combination of resistor-control signals across a plurality of resistor-control outputs, the particular combination corresponding to the particular gain-selection combination of voltages.

4. The circuit according to claim 3 , wherein:

the inner controlled resistor circuit includes a plurality of switches that are each coupled in parallel to a different set of resistors in the bank of resistors so that when one or more of the plurality of switches is in an ON condition, a portion of the bank of resistors is shorted and a resistance of the bank of resistors corresponds to a portion of the bank of resistors not shorted; and

each of the plurality of switches is coupled to one of the plurality of resistor-control outputs so that ON conditions of the plurality of switches correspond to a particular combination of resistor-control voltages across the plurality of resistor-control outputs.

5. The circuit according to claim 3 , wherein:

each resistor-control signal in a particular combination of resistor-control signals is offset by the common mode voltage (V CM ).

6. The circuit according to claim 5 , wherein the common mode voltage (V CM ) is within a range of about 1.5 volts to 34.5 volts for a supply voltage of 36 volts.

7. The circuit according to claim 2 , wherein the common-mode extractor circuit includes:

a voltage divider circuit coupled to the positive input of the instrumentation amplifier and the negative input of the instrumentation amplifier, the output of the voltage divider circuit corresponding to V CM .

8. The circuit according to claim 2 , wherein:

the instrumentation amplifier is a two-opamp instrumentation amplifier that includes a first opamp and a second opamp, and

the bank of resistors of the inner controlled resistor circuit is coupled between an inverting input of the first opamp and an inverting input of the second opamp.

9. The circuit according to claim 2 , wherein:

the instrumentation amplifier is a three-opamp instrumentation amplifier that includes a first opamp, a second opamp, and a third opamp, and

the bank of resistors of the inner controlled resistor circuit is coupled between an inverting input of the first opamp and an inverting input of the second opamp.

10. The circuit according to claim 1 , wherein the gain-control circuit consumes 10 percent or less of a total power consumed by the circuit.

11. The circuit according to claim 1 , wherein the instrumentation amplifier is configured to amplify a differential mode voltage (VDM) corresponding to input signals having a voltage difference within −0.75 volts and +0.75 volts.

12. The circuit according to claim 2 , wherein the gain is controlled to four or more discrete gain values in a range of about 20 to 200.

13. A method for adjusting a gain of an instrumentation amplifier, the method comprising:

extracting a common-mode voltage from inputs to the instrumentation amplifier;

receiving gain-selection signals;

generating, using a gain-decoder circuit, a plurality of resistor-control signals based on the gain-selection signals and the common-mode voltage;

setting a resistance of an inner controlled resistor circuit based on the plurality of resistor-control signals; and

adjusting the gain of the instrumentation amplifier based on the resistance of the inner controlled resistor circuit.

14. The method according to claim 13 , wherein the instrumentation amplifier is a two-opamp instrumentation amplifier.

15. The method according to claim 13 , wherein the instrumentation amplifier is a three-opamp instrumentation amplifier.

16. The method according to claim 13 , wherein the inner controlled resistor circuit comprises a plurality of series-connected resistors and a plurality of switches, each switch of the plurality of switches connected in parallel to one or more of the resistors in the plurality of series connected resistors.

17. The method according to claim 16 , wherein the setting a resistance of the inner controlled resistor circuit based on the plurality of resistor-control signals comprises:

controlling one or more of the switches in an ON condition based on the resistor-control signals; and

shorting a portion of the series-connected resistors using the one or more switches in the ON condition so that the resistance of the inner controlled resistor corresponds to resistors in the plurality of series-connected resistors that are not shorted by the one or more switches in the ON condition.

18. The method according to claim 13 , wherein extracting a common mode voltage from inputs to the instrumentation amplifier; comprises:

applying a positive input terminal and a negative input terminal of the instrumentation amplifier to a voltage divider; and

tapping the voltage divider to obtain the common mode voltage.

19. The method according to claim 13 , wherein each of the plurality of resistor-control signals is a HIGH voltage or a LOW voltage, the HIGH voltage and the LOW voltage offset by the common mode voltage.

20. The method according to claim 19 , wherein the common mode voltage is in a range of about 1.5 volts to about 34.5 volts for a supply voltage of 36 volts.

21. An adjustable gain instrumentation amplifier, comprising:

a two or three opamp instrumentation amplifier;

an inner controlled resistor coupled to the two or three opamp instrumentation amplifier, the gain of the two or three opamp instrumentation amplifier based on a resistance of the inner controlled resistor;

a gain decoder coupled to the inner controlled resistor and configured to provide resistor-control signals to the inner controlled resistor to control the resistance of the inner controlled resistor based on gain-selections signals received at a first gain-selection input and a second gain-selection input of the gain decoder; and

a common mode extractor coupled to the two or three opamp instrumentation amplifier and configured to determine a common-mode voltage from inputs to the two or three opamp instrumentation amplifier, the common-mode voltage transmitted to the gain decoder, which is configured to offset the resistor-control signals provided to the inner controlled resistor by the common-mode voltage.

22. The adjustable gain instrumentation amplifier according to claim 21 , configured to:

provide a gain of 20, 50, 100, or 200 based on four possible combinations gain-selection signals at the first gain-selection input and the second gain-selection input.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2019
From: STANESCU, CORNEL D.; DINCA, CRISTIAN MARIAN; STEELE, GERALD WILLIAM
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050865/0939 →