IP Library Granted Patent US 11,381,205
Granted Patent B2
US 11,381,205 · App. 16/670,131 · Granted Jul 5, 2022

Potentiostat circuit

Inventor: Moez Kanoun (Waterloo, CA)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03F3/04G01N27/49H03F2200/129H03F2200/375
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Quick Facts
Patent No.
US 11,381,205
App. No.
16/670,131
Granted
Jul 5, 2022
Kind
B2
Abstract

A potentiostat circuit for controlling a work electrode voltage and for measuring a work electrode current is disclosed. The disclosed potentiostat circuit implementations have a topology and include elements to provide a plurality of benefits. The plurality of benefits includes an enlarged range of controllable work electrode voltages and bidirectional work electrode current measurements, high immunity from temperatures variations and process mismatch. The disclosed potentiostat circuit implementations can be used in applications requiring accuracy, low power consumption, and small size. The applications can include portable and/or multichannel electrochemical applications.

Claims (37)

1. A potentiostat circuit comprising:

a feedback amplifier coupled to a work electrode, the feedback amplifier configured to set or to maintain a voltage on the work electrode and to output a current corresponding to a work-electrode current flowing to or from the work electrode;

a bias current source coupled between a voltage source and the feedback amplifier and configured to output a bias current, the bias current source having a voltage drop that partially determines an upper limit of a range of possible work-electrode voltages; and

an output current mirror coupled to the feedback amplifier and the bias current source, the output current mirror configured to mirror a mathematical combination of the bias current and the work-electrode current as an output current at an output node, wherein a voltage drop across the output current mirror does not limit the range of possible work-electrode voltages.

2. The potentiostat circuit according to claim 1 , wherein the bias current source is a transistor.

3. The potentiostat circuit according to claim 2 , wherein the bias current source is a current copier in a cascode configuration.

4. The potentiostat circuit according to claim 3 , wherein the current copier in a cascode configuration includes a chopper and an amplifier.

5. The potentiostat circuit according to claim 3 , wherein the current copier is coupled to the output node and is configured to cancel the bias current from the output current.

6. The potentiostat circuit according to claim 1 , wherein the feedback amplifier includes an offset-current source configured to conduct an offset current when the work electrode current flows out of the work electrode and wherein the output current includes the offset current.

7. The potentiostat circuit according to claim 6 , wherein the offset-current source is a first transistor coupled to the work electrode and configured to conduct the offset current.

8. The potentiostat circuit according to claim 7 , further including a second transistor coupled to the output node that is configured to cancel the offset current from the output current.

9. The potentiostat circuit according to claim 6 wherein the offset-current source is duplicated using an offset-current copier coupled to the work electrode and the output node or to a current-to-digital converter.

10. The potentiostat circuit according to claim 9 , wherein the offset-current copier is configured to generate a reference current for the current-to-digital converter.

11. The potentiostat circuit according to claim 9 , wherein the offset-current copier is configured to create a current to cancel the offset current at the output node.

12. The potentiostat circuit according to claim 9 , wherein the offset-current copier is in a cascode configuration.

13. The potentiostat circuit according to claim 12 , wherein the offset-current copier in the cascode configuration includes a chopper and an amplifier.

14. The potentiostat circuit according to claim 1 , wherein the output current mirror is in a cascode configuration.

15. The potentiostat circuit according to claim 14 , wherein the output current mirror in a cascode configuration includes a chopper and an amplifier.

16. A method for measuring a work-electrode current without limiting a range of possible work-electrode voltages, the method comprising:

receiving, at an output current mirror, a mathematical combination of a work electrode current, a bias current, and an offset current;

mirroring, using an output current mirror, the mathematical combination of the work electrode current, the bias current, and the offset current as an output current at an output node;

creating a copy of the bias current using a bias-current copier circuit;

creating a copy of the offset current using an offset-current copier circuit;

coupling the copy of the bias current and the copy of the offset current to the output node;

canceling, using the copy of the bias current and the copy of the offset current, the bias current and the offset current from output current, wherein a voltage drop across the output current mirror does not limit the range of possible work-electrode voltages.

17. The method according to claim 16 , wherein:

the bias-current copier circuit includes a chopper and is in a cascode configuration; and

the offset-current copier circuit includes a chopper and is in a cascode configuration.

18. An electro-chemical measurement system comprising:

an electrochemical cell including a work electrode; and

a potentiostat configured to maintain a work-electrode voltage on the work electrode and further configured to measure a work-electrode current at the work electrode, the potentiostat including:

an output-current mirror configured to duplicate a current corresponding to the work-electrode current as an output current at an output node; and

a bias current source coupled between a voltage source and a feedback amplifier configured to output a bias current, the bias current source having a voltage drop that is lower than a voltage for a current mirror coupled to the work electrode.

19. The electro-chemical measurement system according to claim 18 , wherein:

the output-current mirror is in a cascode configuration and includes a chopper and an amplifier to reduce a mismatch in the output-current mirror.

20. The electro-chemical measurement system according to claim 19 , wherein:

the reduced mismatch corresponds to a reduction of a size of the potentiostat.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2019
From: KANOUN, MOEZ
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050881/0216 →