HDD detection system
View Patent ↗A system for detecting HDDs and in-position states of each of them includes an HDD controller, an analysis module, and a BMC chip. The HDD controller is electrically connected to the HDDs for obtaining SGPIO information and outputting testing signals comprising the SGPIO information. The analysis module receives the testing signals and generates in-position state information according to voltage levels of the testing signals. The BMC chip is electrically connected to the analysis module. The BMC chip receives the in-position state information from the analysis module and generates a detection log accordingly.
1. A Hard Disk Drive (HDD) detection system for detecting in-position states of a plurality of HDDs, the HDD detection system comprising:
an HDD controller, the HDD controller electrically connected to the plurality of HDDs, the HDD controller obtaining Serial General-Purpose Input/Output (SGPIO) information of the plurality of HDDs and outputting testing signals comprising the SGPIO information;
an analysis module, the analysis module receiving the testing signals and generating in-position state information according to level states of the testing signals; and
a Baseboard Management Controller (BMC) chip, the BMC chip electrically connected to the analysis module;
wherein the BMC chip receives the in-position state information from the analysis module and generates a detection log according to the in-position state information;
wherein the analysis module comprises a level detecting unit and a timing unit, the level detecting unit is configured to receive and detect the testing signal in real time, when the level detecting unit detects a voltage level of the testing signal is maintained at a first level within a predetermined time, the level detecting unit determines that the HDD is not present;
wherein when the level detecting unit detects a rising edge of the testing signal, the timing unit is enabled to calculate a time of the testing signal being maintained at a second voltage level, when the level detecting unit detects that the period of the testing signal being maintained at the second voltage level is greater than or equal to the predetermined time, the level detecting unit determines that the HDD is present and the HDD controller is uninitialized; and
wherein when the level detecting unit detects that the period of the testing signal being maintained at the second voltage level is less than the predetermined time and that voltage level of the testing signal alternates between high and low within the predetermined time, the level detecting unit determines that the HDD is present and the HDD controller is initialized.
2. The HDD detection system of claim 1 , wherein the predetermined time is greater than 400 milliseconds.
3. The HDD detection system of claim 1 , wherein the HDD controller is one of a Platform Controller Hub (PCH) and a Host Bus Adapter (HBA).
4. The HDD detection system of claim 1 , wherein the analysis module is one of a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA), and a single-chip microcomputer.
5. The HDD detection system of claim 1 , wherein the testing signal is one of a clock signal, a data output signal, and a load signal.
6. The HDD detection system of claim 1 , further comprising an indicator, wherein the indicator is electrically connected to the BMC chip, the indicator is configured to indicate the in-position state information of the HDD.
7. The HDD detection system of claim 1 , further comprising a plurality of first SGPIO connectors and a plurality of second SGPIO connectors, wherein the plurality of first SGPIO connectors is electrically connected to the HDD controller, the plurality of second SGPIO connectors is electrically connected to the first SGPIO connectors and the analysis module; wherein the analysis module, through the plurality of first SGPIO connectors and the plurality of second SGPIO connectors, receives the testing signals from the HDD controller.
8. A Hard Disk Drive (HDD) detection system for detecting in-position states of a plurality of HDDs, the HDD detection system comprising:
a mainboard, the mainboard comprising an HDD controller and a Baseboard Management Controller (BMC) chip, the HDD controller electrically connected to the plurality of HDDs, the HDD controller obtaining Serial General-Purpose Input/Output (SGPIO) information of the plurality of HDDs and outputting testing signals comprising the SGPIO information; and
an HDD backplane, the HDD backplane comprising an analysis module, the analysis module receiving the testing signals and generating in-position state information according to level states of the testing signals;
wherein the BMC chip is electrically connected to the analysis module, the BMC chip receives the in-position state information from the analysis module and generates a detection log according to the in-position state information;
wherein the analysis module comprises a level detecting unit and a timing unit, the level detecting unit is configured to receive and detect the testing signal in real time, when the level detecting unit detects a voltage level of the testing signal is maintained at a first level within a predetermined time, the level detecting unit determines that the HDD is not present;
wherein when the level detecting unit detects a rising edge of the testing signal, the timing unit is enabled to calculate a time of the testing signal being maintained at a second voltage level, when the level detecting unit detects that the period of the testing signal being maintained at the second voltage level is greater than or equal to the predetermined time, the level detecting unit determines that the HDD is present and the HDD controller is uninitialized; and
wherein when the level detecting unit detects that the period of the testing signal being maintained at the second voltage level is less than the predetermined time and that voltage level of the testing signal alternates between high and low within the predetermined time, the level detecting unit determines that the HDD is present and the HDD controller is initialized.
9. The HDD detection system of claim 8 , wherein the plurality of HDDs is inserted into the HDD backplane.
10. The HDD detection system of claim 8 , wherein the predetermined time is greater than 400 milliseconds.
11. The HDD detection system of claim 8 , wherein the HDD controller is one of a Platform Controller Hub (PCH) and a Host Bus Adapter (HBA).
12. The HDD detection system of claim 8 , wherein the analysis module is one of a Complex Programmable Logic Device (CPLD), a Field Programmable Gate Array (FPGA), and a single-chip microcomputer.
13. The HDD detection system of claim 8 , wherein the testing signal is one of a clock signal, a data output signal, and a load signal.
14. The HDD detection system of claim 8 , further comprising an indicator, wherein the indicator is positioned on the HDD backplane and is electrically connected to the BMC chip, the indicator is configured to indicate the in-position state information of the HDD.
15. The HDD detection system of claim 8 , further comprising a plurality of first SGPIO connectors and a plurality of second SGPIO connectors, wherein the plurality of first SGPIO connectors is positioned on the mainboard and is electrically connected to the HDD controller, the plurality of second SGPIO connectors is positioned on the HDD backplane and is electrically connected to the first SGPIO connectors and the analysis module; wherein the analysis module, through the plurality of first SGPIO connectors and the plurality of second SGPIO connectors, receives the testing signals from the HDD controller.