IP Library Granted Patent US 11,267,696
Granted Patent B2
US 11,267,696 · App. 16/675,245 · Granted Mar 8, 2022

MEMS devices and methods of forming thereof

Inventors: Ranganathan Nagarajan (Singapore, SG); Jia Jie Xia (Singapore, SG); Rakesh Kumar (Singapore, SG); Bevita Kallupalathinkal Chandran (Singapore, SG)
Assignee: VANGUARD INIERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
B81B3/0081B81C1/0069B81B2203/0127B81B2203/0307B81C2201/0105
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Quick Facts
Patent No.
US 11,267,696
App. No.
16/675,245
Granted
Mar 8, 2022
Kind
B2
Abstract

In a non-limiting embodiment, a MEMS device may include a substrate having a device stopper. The device stopper may be integral to the substrate and formed of the substrate material. A thermal dielectric isolation layer may be arranged over the device stopper and the substrate. A device cavity may extend through the substrate and the thermal dielectric isolation layer. The thermal dielectric isolation layer and the device stopper at least partially surround the device cavity. An active device layer may be arranged over the thermal dielectric isolation layer and the device cavity.

Claims (13)

1. A microelectromechanical (MEMS) device comprising:

a substrate comprising a device stopper, wherein the device stopper is integral to the substrate and formed of the substrate material;

a dielectric isolation layer arranged over the device stopper and the substrate, wherein the dielectric isolation layer is formed by thermal oxidation, and the device stopper at least partially extends through the dielectric isolation layer, and the thickness of the device stopper is less than the thickness of the dielectric isolation layer;

a device cavity extending through the substrate and the dielectric isolation layer, wherein the dielectric isolation layer and the device stopper at least partially surround the device cavity; and

an active device layer arranged over the dielectric isolation layer and the device cavity.

2. The MEMS device of claim 1 , wherein the active device layer contacts a top surface of the dielectric isolation layer; and wherein the active device layer is anchored to the substrate by the dielectric isolation layer.

3. The MEMS device of claim 1 , wherein the active device layer comprises a piezoelectric stack having at least a first electrode layer, a piezoelectric layer over the first electrode layer, and a second electrode layer over the piezoelectric layer.

4. The MEMS device of claim 1 , wherein the dielectric isolation layer is a thermal silicon oxide layer.

5. The MEMS device of claim 1 , wherein the active device layer comprises a membrane structure.

6. The MEMS device of claim 1 , wherein the device stopper is formed of silicon material.

7. The MEMS device of claim 1 , wherein the device stopper has a pillar configuration arranged at a top side of the substrate.

8. The MEMS device of claim 1 , wherein the device stopper has a ring configuration at least partially surrounding the device cavity.

9. The MEMS device of claim 1 , wherein the active device layer is connected to the substrate at an anchor region of the active device layer, and further comprising a bond pad arranged over the active device layer at the anchor region.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2020
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
Reel/Frame 051828/0252 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2019
From: NAGARAJAN, RANGANATHAN; XIA, JIA JIE; KUMAR, RAKESH; KALLUPALATHINKAL CHANDRAN, BEVITA
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 050989/0265 →