IP Library Granted Patent US 11,331,738
Granted Patent B2
US 11,331,738 · App. 16/677,245 · Granted May 17, 2022

High temperature resistant silicon joint for the joining of ceramics

Inventors: Brent Elliot (Cupertino, CA); Alfred Grant Elliot (Palo Alto, CA)
Assignee: Watlow Electric Manufacturing Company
B23K1/0016B23K1/19B23K35/286B23K35/302B23K35/36C04B35/581C04B37/003C04B37/006C04B2237/16C04B2237/366
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Quick Facts
Patent No.
US 11,331,738
App. No.
16/677,245
Granted
May 17, 2022
Kind
B2
Abstract

A method for the joining of ceramic pieces with a hermetically sealed joint comprising brazing a layer of joining material between the two pieces. The ceramic pieces may be aluminum nitride or other ceramics, and the pieces may be brazed with a high purity silicon or a silicon alloy under controlled atmosphere. The joint material is adapted to later withstand both the environments within a process chamber during substrate processing, and the oxygenated atmosphere which may be seen within the interior of a heater or electrostatic chuck.

Claims (32)

1. A multi-layer ceramic plate assembly for use in semiconductor processing, said multi-layer ceramic plate assembly comprising:

an upper plate layer, said upper plate layer adapted to support a semiconductor substrate, said upper plate layer comprising aluminum nitride;

a lower plate layer, said lower plate layer comprising aluminum nitride;

said upper plate layer and said lower plate layer joined together to form an interior space between said upper plate layer and said lower plate layer within an annulus of an annular joining layer, and

an annular joining layer disposed between an aluminum nitride surface of said upper plate layer and an aluminum nitride surface of said lower plate layer, wherein said annular joining layer joins an outer periphery of said upper plate layer to an outer periphery of said lower plate layer, wherein an entirety of said joining layer comprises more than 98% silicon by weight, and wherein said joining layer hermetically seals said interior space between said upper plate layer and said lower plate layer from the exterior of said ceramic plate assembly through said joining layer, wherein said annular joining layer has not diffused into either said upper plate layer or said lower plate layer.

2. The multi-layer ceramic plate assembly of claim 1 wherein said joining layer comprises silicon of greater than 99% silicon by weight.

3. The multi-layer ceramic plate assembly of claim 1 further comprising a heater residing between said upper plate layer and said lower plate layer.

4. The multi-layer ceramic plate assembly of claim 2 further comprising a heater residing between said upper plate layer and said lower plate layer.

5. The multi-layer ceramic plate assembly of claim 1 further comprising a heater residing between said upper plate layer and said lower plate layer, wherein said joining layer comprises a ring around the outer periphery of said heater, said ring having an inner diameter larger than the maximum diameter of said heater.

6. The multi-layer ceramic plate assembly of claim 1 further comprising a planar electrode residing between said upper plate layer and said lower plate layer.

7. The multi-layer ceramic plate assembly of claim 2 further comprising a planar electrode residing between said upper plate layer and said lower plate layer.

8. A multi-layer ceramic plate assembly for use in semiconductor processing, said multi-layer ceramic plate assembly comprising:

an upper plate layer, said upper plate layer adapted to support a semiconductor substrate, said upper plate layer comprising aluminum nitride;

a lower plate layer, said lower plate layer comprising aluminum nitride;

said upper plate layer and said lower plate layer joined together to form an interior space between said upper plate layer and said lower plate layer within an annulus of an annular joining layer, and

an annular joining layer disposed between an aluminum nitride surface of said upper plate layer and an aluminum nitride surface of said lower plate layer, wherein said annular joining layer joins an outer periphery of said upper plate layer to an outer periphery of said lower plate layer, wherein an entirety of said joining layer comprises more than 98% silicon by weight, and wherein said joining layer hermetically seals said interior space between said upper plate layer and said lower plate layer from the exterior of said ceramic plate assemble through said joining layer, wherein the hermetic seal seals said interior space between said upper plate layer and said lower plate layer at a vacuum leak rate of <1×10E-9 sccm He/sec.

9. The multi-layer ceramic plate assembly of claim 8 wherein said joining layer comprises silicon of greater than 99% silicon by weight.

10. The multi-layer ceramic plate assembly of claim 9 further comprising a heater residing between said upper plate layer and said lower plate layer.

11. The multi-layer ceramic plate assembly of claim 8 further comprising a heater residing between said upper plate layer and said lower plate layer.

12. The multi-layer ceramic plate assembly of claim 8 further comprising a heater residing between said upper plate layer and said lower plate layer, wherein said joining layer comprises a ring around the outer periphery of said heater, said ring having an inner diameter larger than the maximum diameter of said heater.

13. The multi-layer ceramic plate assembly of claim 8 further comprising a planar electrode residing between said upper plate layer and said lower plate layer.

14. The multi-layer ceramic plate assembly of claim 9 further comprising a planar electrode residing between said upper plate layer and said lower plate layer.

15. A multi-layer ceramic plate assembly for use in semiconductor processing, said multi-layer ceramic plate assembly comprising:

an upper plate layer, said upper plate layer adapted to support a semiconductor substrate, said upper plate layer comprising aluminum nitride;

a lower plate layer, said lower plate layer comprising aluminum nitride;

said upper plate layer and said lower plate layer joined together to form an interior space between said upper plate layer and said lower plate layer within an annulus of an annular joining layer, and

an annular joining layer disposed between an aluminum nitride surface of said upper plate layer and an aluminum nitride surface of said lower plate layer, wherein said annular joining layer joins an outer periphery of said upper plate layer to an outer periphery of said lower plate layer, wherein an entirety of said joining layer comprises more than 98% silicon by weight, and wherein said joining layer hermetically seals said interior space between said upper plate layer and said lower plate layer from the exterior of said ceramic plate assemble through said joining layer, wherein said annular joining layer is greater than or equal to about 0.001 inches to less than or equal to about 0.01 inches thick.

16. The multi-layer ceramic plate assembly of claim 15 wherein said joining layer comprises silicon of greater than 99% silicon by weight.

17. The multi-layer ceramic plate assembly of claim 16 further comprising a heater residing between said upper plate layer and said lower plate layer.

18. The multi-layer ceramic plate assembly of claim 15 further comprising a heater residing between said upper plate layer and said lower plate layer.

19. The multi-layer ceramic plate assembly of claim 15 further comprising a heater residing between said upper plate layer and said lower plate layer, wherein said joining layer comprises a ring around the outer periphery of said heater, said ring having an inner diameter larger than the maximum diameter of said heater.

20. The multi-layer ceramic plate assembly of claim 15 further comprising a planar electrode residing between said upper plate layer and said lower plate layer.

Assignments (4)
PATENT SECURITY AGREEMENT (SHORT FORM) Recorded Mar 3, 2021
From: WATLOW ELECTRIC MANUFACTURING COMPANY
To: BANK OF MONTREAL, AS ADMINISTRATIVE AGENT
Reel/Frame 055479/0708 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2020
From: COMPONENT RE-ENGINEERING COMPANY, INC.
To: WATLOW ELECTRIC MANUFACTURING COMPANY
Reel/Frame 053786/0986 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2020
From: ELLIOT, BRENT
To: COMPONENT RE-ENGINEERING COMPANY, INC.
Reel/Frame 053169/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2020
From: ELLIOT, ALFRED GRANT
To: COMPONENT RE-ENGINEERING COMPANY, INC.
Reel/Frame 053169/0825 →
Continuity (2)
Continuation 14977590 · Dec 21, 2015
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