Method and apparatus for analyzing semiconductor wafer

1. A method of analyzing a semiconductor wafer for analyzing a defect distribution pattern on a semiconductor wafer to be tested, the method comprising:

obtaining a defect distribution map of the semiconductor wafer to be tested, the defect distribution map indicating a defect distribution within a surface of the semiconductor wafer to be tested;

establishing a three-dimensional model to be tested according to the defect distribution map, wherein an XY plane of the three-dimensional model to be tested corresponds to the surface of the semiconductor wafer to be tested, and a Z-axis of the three-dimensional model to be tested corresponds to the number of defects in each grid unit in the XY plane; and

calculating a similarity between the three-dimensional model to be tested and at least one three-dimensional reference model to determine a defect distribution pattern of the semiconductor wafer to be tested, wherein each three-dimensional reference model indicates a pattern of defect distribution;

adjusting the three-dimensional model to be tested to obtain an adjusted three-dimensional model to be tested comprising:

in response to the number of grid units of the XY plane of the three-dimensional model to be tested being inconsistent with the number of grid units of the XY plane of the at least one three-dimensional reference model, re-gridding the XY plane of the three-dimensional model to be tested according to the number of grid units of the XY plane of the at least one three-dimensional reference model to obtain the XY plane adjusted three-dimensional model to be tested; and

calculating the similarity further comprises calculating a similarity between the adjusted three-dimensional model to be tested and the at least one three-dimensional reference model to determine the defect distribution pattern of the semiconductor wafer to be tested.

2. The method of claim 1 , wherein the adjusting the three-dimensional model to be tested further comprises: normalizing the number of defects in each grid unit in the XY plane to obtain the Z-axis adjusted three-dimensional model to be tested.

3. The method of claim 1 , wherein the adjusting the three-dimensional model to be tested further comprises: Fourier transforming the number of defects in each grid unit in the XY plane to obtain the Z-axis adjusted three-dimensional model to be tested.

4. The method of claim 1 , wherein the adjusting the three-dimensional model to be tested further comprises: rotating the three-dimensional model to be tested multiple times around the Z-axis;

the computing further comprises, for each of the at least one three-dimensional reference model, calculating the similarity between the three-dimensional reference model and the three-dimensional model to be tested after each rotation, wherein the highest similarity is the similarity between the three-dimensional model to be tested and the three-dimensional reference model.

5. The method of claim 1 , wherein the at least one three-dimensional reference model comprises a plurality of initial three-dimensional reference models; the method further comprising:

calculating a similarity between each of the plurality of initial three-dimensional reference models and the three-dimensional model to be tested; and

the defect distribution pattern of the semiconductor wafer to be tested is determined to be a defect distribution pattern indicated by the initial three-dimensional reference model corresponding to a highest similarity in response to the highest similarity among the obtained plurality of similarities being higher than a preset threshold.

6. The method of claim 1 further comprising: establishing the at least one three-dimensional reference model.

7. The method of claim 6 wherein the establishing further comprises:

obtaining distribution maps of a plurality of semiconductor wafer samples;

establishing a plurality of three-dimensional sample models based on defect distribution maps of the plurality of semiconductor wafer samples;

classifying the plurality of three-dimensional sample models into at least one category according to a degree of similarity between the plurality of three-dimensional sample models, and the three-dimensional sample models included in a same category indicate a same defect distribution pattern; and

selecting any one three-dimensional sample model in the same category as the three-dimensional reference model for that category.

8. The method of claim 1 , wherein, when it is determined that the defect distribution of the semiconductor wafer to be tested is a defect distribution pattern indicated by the at least one three-dimensional reference model, the method further comprising:

marking the semiconductor wafer to be tested, and/or further analyzing the cause of the defect of the semiconductor wafer to be tested.

9. An apparatus for analyzing a semiconductor wafer for performing a method of analyzing a semiconductor wafer for analyzing a defect distribution pattern on a semiconductor wafer to be tested, the apparatus comprising:

a processor and a memory;

wherein at least one three-dimensional reference model is stored in a database on the memory, and each three-dimensional reference model indicates a pattern of defect distribution;

wherein the processor is configured to:

obtain a defect distribution map of the semiconductor wafer to be tested, the defect distribution map indicating a defect distribution within a surface of the semiconductor wafer to be tested;

establish a three-dimensional model to be tested according to the defect distribution map, wherein an XY plane of the three-dimensional model to be tested corresponds to the surface of the semiconductor wafer to be tested, and a Z-axis of the three-dimensional model to be tested corresponds to the number of defects in each grid unit in the XY plane; and

calculate a similarity between the three-dimensional model to be tested and the at least one three-dimensional reference model to determine a defect distribution pattern of the semiconductor wafer to be tested;

adjust the three-dimensional model to be tested to obtain an adjusted three-dimensional model to be tested;

calculate a similarity between the adjusted three-dimensional model to be tested and the at least one three-dimensional reference model to determine the defect distribution pattern of the semiconductor wafer to be tested;

rotate the three-dimensional model to be tested multiple times around the Z-axis;

for each of the at least one three-dimensional reference model, calculate the similarity between the three-dimensional reference model and the three-dimensional model to be tested after each rotation, wherein the highest similarity is the similarity between the three-dimensional model to be tested and the three-dimensional reference model.

10. The apparatus of claim 9 , wherein the processor is further configured to: normalize the number of defects in each grid unit in the XY plane to obtain the Z-axis adjusted three-dimensional model to be tested.

11. The apparatus of claim 9 , wherein the processor is further configured to: Fourier transform the number of defects in each grid unit in the XY plane to obtain the Z-axis adjusted three-dimensional model to be tested.

12. The apparatus of claim 9 , wherein the processor is further configured to:

in response to the number of grid units of the XY plane of the three-dimensional model to be tested being inconsistent with the number of grid units of the XY plane of the at least one three-dimensional reference model, re-grid the XY plane of the three-dimensional model to be tested according to the number of grid units of the XY plane of the at least one three-dimensional reference model to obtain the XY plane adjusted three-dimensional model to be tested.

13. The apparatus of claim 9 , wherein the at least one three-dimensional reference model stored in the database comprises a plurality of initial three-dimensional reference models;

the processor is configured to: calculate a similarity between each of the plurality of initial three-dimensional reference models and the three-dimensional model to be tested; and

the defect distribution pattern of the semiconductor wafer to be tested is determined to be a defect distribution pattern indicated by the initial three-dimensional reference model corresponding to a highest similarity in response to the highest similarity among the obtained plurality of similarities being higher than a preset threshold.

14. The apparatus of claim 9 wherein the processor is further configured to:

establish the at least one three-dimensional reference model and store the established at least one three-dimensional reference model to the database.

15. The apparatus of claim 14 , wherein the processor is further configured to:

obtain distribution maps of a plurality of semiconductor wafer samples;

establish a plurality of three-dimensional sample models based on defect distribution maps of the plurality of semiconductor wafer samples;

classify the plurality of three-dimensional sample models into at least one category according to a degree of similarity between the plurality of three-dimensional sample models, wherein the three-dimensional sample models included in a same category indicate a same defect distribution pattern; and

select any one three-dimensional sample model in the same category as the three-dimensional reference model for that category.

16. The apparatus of claim 9 , wherein the processor is further configured to:

mark the semiconductor wafer to be tested, and/or further analyzing the cause of the defect of the semiconductor wafer to be tested when it is determined that the defect distribution of the semiconductor wafer to be tested is a defect distribution pattern indicated by the at least one three-dimensional reference model.

17. A method of analyzing a semiconductor wafer for analyzing a defect distribution pattern on a semiconductor wafer to be tested, the method comprising:

obtaining a defect distribution map of the semiconductor wafer to be tested, the defect distribution map indicating a defect distribution within a surface of the semiconductor wafer to be tested;

establishing a three-dimensional model to be tested according to the defect distribution map, wherein an XY plane of the three-dimensional model to be tested corresponds to the surface of the semiconductor wafer to be tested, and a Z-axis of the three-dimensional model to be tested corresponds to the number of defects in each grid unit in the XY plane, the XY plane being associated with a location of a defect within the surface of the semiconductor wafer to be tested, and the Z-axis being associated with an absolute number of defects; and

calculating a similarity between the three-dimensional model to be tested and at least one three-dimensional reference model to determine a defect distribution pattern of the semiconductor wafer to be tested, wherein each three-dimensional reference model indicates a pattern of defect distribution.

18. The method of claim 17 further comprising:

rotating the three-dimensional model to be tested multiple times around the Z-axis by a predetermined angle to adjust the three-dimensional model to be tested;

obtaining an adjusted three-dimensional model to be tested; and

calculating the similarity further comprises calculating a similarity between the adjusted three-dimensional model to be tested and the at least one three-dimensional reference model to determine the defect distribution pattern of the semiconductor wafer to be tested.

19. The method of claim 17 further comprising establishing the at least one three-dimensional reference model, comprising:

obtaining distribution maps of a plurality of semiconductor wafer samples;

establishing a plurality of three-dimensional sample models based on defect distribution maps of the plurality of semiconductor wafer samples;

classifying the plurality of three-dimensional sample models into at least one category according to a degree of similarity between the plurality of three-dimensional sample models, and the three-dimensional sample models included in a same category indicate a same defect distribution pattern; and

selecting any one three-dimensional sample model in the same category as the three-dimensional reference model for that category.