IP Library Granted Patent US 10,893,626
Granted Patent B2
US 10,893,626 · App. 16/685,339 · Granted Jan 12, 2021

Information handling system having synchronized power loss detection armed state

Inventors: Aaron M. Rhinehart (Georgetown, TX); Dan Rao (Austin, TX); Binay A. Kuruvila (Cedar Park, TX)
Assignee: Dell Products, L.P.
H05K7/1492G06F1/3206G06F11/3034G06F11/2015
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Quick Facts
Patent No.
US 10,893,626
App. No.
16/685,339
Granted
Jan 12, 2021
Kind
B2
Abstract

An information handling system includes multiple power supply units, and first and second chassis management controllers. The power supply units provide power to components within the information handling system. The first chassis management controller calculates a first number of power supply units needed to provide power to the components of the information handling system, and asserts a first chassis armed signal to servers in response to a detection that the first number of power supply units is greater than zero. The second chassis management controller receives the first number of power supply units from the first chassis management controller, and asserts a second chassis armed signal to the servers in response to a detection that the first number of power supply units being greater than zero.

Claims (46)

1. An information handling system comprising:

a first chassis management controller including first monitoring circuitry to monitor a plurality of power supply units, and based on the monitoring of the power supply units, to provide a first signal;

a second chassis management controller including second monitoring circuitry to monitor the power supply units, and based on the monitoring of the power supply units, to provide a second signal; and

a server including status circuitry to communicate with the first and second chassis management controllers, during a boot operation of the server, the status circuitry to: detect the first signal from the first chassis management controller; detect the second signal from the second chassis management controller; determine whether a server persistent memory criteria has been met based on the first and second signals; and in response to the server persistent memory criteria being met, arm the server in a persistent memory mode, otherwise set persistent memory of the server in a read only mode.

2. The information handling system of claim 1 , wherein the power supply units to provide power to components within the information handling system, wherein the components include the server.

3. The information handling system of claim 1 , wherein the server persistent memory criteria has been met in response to either the first signal or the second signal being a chassis armed signal.

4. The information handling system of claim 3 , wherein the chassis armed signal indicates that a current number of power supplies operating is being monitored by the first monitoring circuitry within the first chassis management controller, by the second monitoring circuitry within the second chassis management controller, or by both the first monitoring circuitry and by the second monitoring circuitry.

5. The information handling system of claim 1 , wherein in response to the server persistent memory criteria being met, the server further to: boot an operating system of the server; determine whether a chassis disarm signal has been received; and provide a power monitoring lost signal to a user in response to the chassis disarm signal being received.

6. The information handling system of claim 5 , wherein in response to the server persistent memory criteria being met, the server further to: determine whether a chassis arm signal has been received after the chassis disarm signal has been received; and provide a power monitoring restored signal to the user in response to the chassis arm signal being received.

7. The information handling system of claim 5 , wherein the reception of the chassis arm signal from the first chassis management controller indicates that first monitoring circuitry is no longer able to detect a power loss event.

8. The information handling system of claim 1 , wherein the first signal from the first chassis management controller and the second signal from the second chassis management controller are sent via a low-latency communication link.

9. A method comprising:

detecting, during a boot operation of an information handling system, a first signal from a first chassis management controller;

detecting, during the boot operation, a second signal from a second chassis management controller;

determining, during the boot operation, whether a server persistent memory criteria has been met based on the first and second signals;

if the server persistent memory criteria has been met, then arming the server in a persistent memory mode; and

otherwise setting persistent memory of the server in a read only mode.

10. The method of claim 9 , wherein in response to the server persistent memory criteria being met, the method further comprises:

booting an operating system of the server;

determining whether a chassis disarm signal has been received; and

providing a power monitoring lost signal to a user in response to the chassis disarm signal being received.

11. The method of claim 10 , wherein in response to the server persistent memory criteria being met, the method further comprises:

determining whether a chassis arm signal has been received after the chassis disarm signal has been received; and

providing a power monitoring restored signal to the user in response to the chassis arm signal being received.

12. The method of claim 9 , wherein the server persistent memory criteria has been met in response to either the first signal or the second signal being a chassis armed signal.

13. The method of claim 9 , wherein the chassis armed signal indicates that the current number of power supplies operating is being monitored by first monitoring circuitry within the first chassis management controller, by second monitoring circuitry within the second chassis management controller, or by both the first monitoring circuitry and by the second monitoring circuitry.

14. The method of claim 9 , wherein the first signal from the first chassis management controller and the second signal from the second chassis management controller are sent via a low-latency communication link.

15. A method comprising:

detecting, during a boot operation of an information handling system, a first signal from a first chassis management controller;

detecting, during the boot operation, a second signal from a second chassis management controller;

determining, during the boot operation, whether a server persistent memory criteria has been met based on the first and second signals;

in response to the server persistent memory criteria not being met:

disarming the server;

setting persistent memory of the server in a read only mode; and

providing a power monitoring lost signal to a user of a server during a power-on self test of the server; and

in response to the server persistent memory criteria being met, arming the server in a persistent memory mode.

16. The method of claim 15 , wherein in response to the server persistent memory criteria being met, the method further comprises:

booting an operating system of the server;

determining whether a chassis disarm signal has been received; and

providing the power monitoring lost signal to the user in response to the chassis disarm signal being received.

17. The method of claim 16 , wherein in response to the server persistent memory criteria being met, the method further comprises:

determining whether a chassis arm signal has been received after the chassis disarm signal has been received; and

providing a power monitoring restored signal to the user in response to the chassis arm signal being received.

18. The method of claim 15 , wherein the server persistent memory criteria has been met in response to either the first signal or the second signal being a chassis armed signal.

19. The method of claim 15 , wherein the chassis armed signal indicates that a current number of power supplies operating is being monitored by first monitoring circuitry within the first chassis management controller, by second monitoring circuitry within the second chassis management controller, or by both the first monitoring circuitry and by the second monitoring circuitry.

20. The method of claim 15 , wherein the first signal from the first chassis management controller and the second signal from the second chassis management controller are sent via a low-latency communication link.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053311/0169) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0742 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052216/0758) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0680 →
RELEASE OF SECURITY INTEREST AF REEL 052243 FRAME 0773 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0152 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 053311/0169 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 26, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052243/0773 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Mar 24, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052216/0758 →