IP Library Granted Patent US 10,922,093
Granted Patent B2
US 10,922,093 · App. 16/687,313 · Granted Feb 16, 2021

Data processing device, processor core array and method for characterizing behavior of equipment under observation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,922,093
App. No.
16/687,313
Filed
Nov 18, 2019
Granted
Feb 16, 2021
Kind
B2
Examiner
NGUYEN, TAN
Art Unit
2827
USPC
713/100
Abstract

A data processing device ( 100 ) characterizes behavior properties of equipment under observation ( 105 ). The device ( 100 ) has a plurality of processing units that are adapted to process input values (a) to output values (e) according to numerical transfer functions. The functions implement an input-to-output mapping specified by a configuration (C) that is obtained by pre-processing historic data ( 114 ) from a plurality of master equipment ( 104 ). The configuration is related to the behavior properties of the equipment ( 105 ) so that some of the output values (e) represent the behavior properties of the equipment ( 105 ) under observation.

Claims (36)

1. A data processing device for characterizing behavior properties of equipment under observation, the data processing device comprising:

a processor core array comprising two or more processor cores configured to select processor cores of the two or more processor cores as a first processing stage and processor cores of the two or more processor cores as a second processing stage according to an availability of the processor cores and according to a presence of equipment data values from an equipment under observation, wherein:

the processor cores of the first processing stage receive two or more equipment data values from the equipment under observation as input and provide two or more intermediate data values as output, according to two or more first numerical transfer functions, and wherein the processor cores of the second processing stage receive the two or more intermediate data values as input and provide behavior data as output values according to a second numerical transfer function;

the selected processor cores process input values based on numerical transfer functions to output values by implementing an input-to-output mapping based on a configuration obtained by a pre-processing of historic data from two or more master equipment and related to the behavior properties of the equipment under observation; and

the output values predict future behavior properties of the equipment under observation.

2. The data processing device of claim 1 , wherein equipment data values comprise values transmitted to the data processing device by sensors operatively associated with the equipment under observation.

3. The data processing device of claim 2 , further comprising the processor core array:

assigning, in a memory operatively associated with the data processing device, data structures to operate as configuration buffers; and

assigning a data structure to receive a first configuration of a first processing context and assigning a data structure to receive a second configuration of a second processing context, and wherein the processor core array selects two or more processor cores to process data values using the first and second configurations in response to equipment data values transmitted to the data processing device by sensors operatively associated with the equipment under observation.

4. The data processing device of claim 1 , wherein each equipment data value received as input corresponds to a single output value.

5. The data processing device of claim 1 , wherein an equipment data value received as input corresponds to a plurality of output values, and each output value predicts a behavior property of the equipment under observation.

6. The data processing device of claim 1 , wherein one or more processor cores comprises a field-programmable gate array.

7. The data processing device of claim 1 , wherein a configuration bus distributes the configuration to the selected processor cores.

8. A computer-implemented method for operating a data processing device to characterize behavior properties of equipment under observation, the computer-implemented method comprising:

selecting processor cores of a processor core array comprising two or more processor cores as a first processing stage and processor cores of the two or more processor cores as a second processing stage, according to an availability of the processor cores and according to a presence of equipment data values from an equipment under observation, wherein the processor cores of the first processing stage receive two or more equipment data values from the equipment under observation as input and provide two or more intermediate data values as output, according to two or more first numerical transfer functions, and wherein the processor cores of the second processing stage receive the two or more intermediate data values as input and provide behavior data as output values according to a second numerical transfer function; and

processing input values, by the selected processor cores, based on numerical transfer functions to output values by implementing an input-to-output mapping based on a configuration obtained by a pre-processing of historic data from two or more master equipment and related to the behavior properties of the equipment under observation, wherein the output values predict future behavior properties of the equipment under observation.

9. The computer-implemented method of claim 8 , wherein equipment data values comprise values transmitted to the data processing device by sensors operatively associated with the equipment under observation.

10. The computer-implemented method of claim 9 , further comprising the processor core array:

assigning, in a memory operatively associated with the data processing device, data structures to operate as configuration buffers;

assigning a data structure to receive a first configuration of a first processing context and assigning a data structure to receive a second configuration of a second processing context; and

selecting two or more processor cores to process data values using the first and second configurations in response to equipment data values transmitted to the data processing device by sensors operatively associated with the equipment under observation.

11. The computer-implemented method of claim 8 , wherein each equipment data value received as input corresponds to a single output value.

12. The computer-implemented method of claim 8 , wherein an equipment data value received as input corresponds to a plurality of output values, and each output value predicts a behavior property of the equipment under observation.

13. The computer-implemented method of claim 8 , wherein one or more processor cores comprises a field-programmable gate array.

14. The computer-implemented method of claim 8 , wherein a configuration bus distributes the configuration to the selected processor cores.

15. A non-transitory computer-readable medium having stored thereon a sequence of computer-executable instructions which when executed by at least one processor of a computer performs a method for controlling a data processing device to characterize behavior properties of equipment under observation, the method comprising:

selecting processor cores of a processor core array comprising two or more processor cores as a first processing stage and processor cores of the two or more processor cores as a second processing stage, according to an availability of the processor cores and according to a presence of equipment data values from an equipment under observation, wherein the processor cores of the first processing stage receive two or more equipment data values from the equipment under observation as input and provide two or more intermediate data values as output, according to two or more first numerical transfer functions, and wherein the processor cores of the second processing stage receive the two or more intermediate data values as input and provide behavior data as output values according to a second numerical transfer function; and

processing input values, by the selected processor cores, based on numerical transfer functions to output values by implementing an input-to-output mapping based on a configuration obtained by a pre-processing of historic data from two or more master equipment and related to the behavior properties of the equipment under observation, wherein the output values predict future behavior properties of the equipment under observation.

16. The non-transitory computer-readable medium of claim 15 , wherein equipment data values comprise values transmitted to the data processing device by sensors operatively associated with the equipment under observation.

17. The non-transitory computer-readable medium of claim 16 , further comprising:

assigning, in a memory operatively associated with the data processing device, data structures to operate as configuration buffers;

assigning a data structure to receive a first configuration of a first processing context and assigning a data structure to receive a second configuration of a second processing context; and

selecting two or more processor cores to process data values using the first and second configurations in response to equipment data values transmitted to the data processing device by sensors operatively associated with the equipment under observation.

18. The non-transitory computer-readable medium of claim 15 , wherein each equipment data value received as input corresponds to a single output value.

19. The non-transitory computer-readable medium of claim 15 , wherein an equipment data value received as input corresponds to a plurality of output values, and each output value predicts a behavior property of the equipment under observation.

20. The non-transitory computer-readable medium of claim 15 , wherein one or more processor cores comprises a field-programmable gate array.

Assignments (2)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053383/0117) Recorded Nov 3, 2021
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: BLUE YONDER GROUP, INC.
Reel/Frame 058794/0776 →
RELEASE OF SECURITY INTEREST Recorded Sep 16, 2021
From: JPMORGAN CHASE BANK, N.A.
To: BLUE YONDER GROUP, INC.; BLUE YONDER, INC.; JDA SOFTWARE SERVICES, INC.; I2 TECHNOLOGIES INTERNATIONAL SERVICES, LLC; MANUGISTICS SERVICES, INC.; MANUGISTICS HOLDINGS DELAWARE II, INC.; REDPRAIRIE COLLABORATIVE FLOWCASTING GROUP, LLC; JDA SOFTWARE RUSSIA HOLDINGS, INC.; REDPRAIRIE SERVICES CORPORATION; BY BOND FINANCE, INC.; BY NETHERLANDS HOLDING, INC.; BY BENELUX HOLDING, INC.
Reel/Frame 057724/0593 →