IP Library Granted Patent US 11,189,900
Granted Patent B2
US 11,189,900 · App. 16/690,625 · Granted Nov 30, 2021

Tapered broadband balun

Inventor: Jesús Anzoátegui Cumana Morales (Berlin, DE)
Assignee: Corning Research & Development Corporation
H01P5/02H01P11/003H03F3/345H05K1/0242H05K1/115H05K3/4046H03F2200/06H03F2200/09H03F2200/222H03F2200/387H03F2200/451H05K2201/09827
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Quick Facts
Patent No.
US 11,189,900
App. No.
16/690,625
Granted
Nov 30, 2021
Kind
B2
Abstract

A balun is disclosed and includes a dielectric substrate defining a first surface and a second surface. The balun includes a first output port including a first output ground portion and first output power portion; a second output port including a second output ground portion and a second output power portion; and an input port including an input ground portion and input power portion. The first output ground portion, the second output ground portion, and the input ground portion are coupled at a ground junction portion. The first output power portion, the second output power portion, and the input power portion are coupled at a power junction portion. The first output power portion, the second output power portion, and the input power portion are positioned on the first surface. The first output ground portion, the second output ground portion, and the input ground portion are positioned on the second surface.

Claims (73)

1. A balun comprising:

a dielectric substrate defining a first surface and a second surface opposite the first surface;

a first output port comprising a first output ground portion and a first output power portion;

a second output port comprising a second output ground portion and a second output power portion; and

an input port comprising an input ground portion and an input power portion, wherein:

the first output ground portion, the second output ground portion, and the input ground portion are coupled at a ground junction portion;

the first output power portion, the second output power portion, and the input power portion are coupled at a power junction portion;

the first output power portion, the second output power portion, and the input power portion are positioned on the first surface; and

the first output ground portion, the second output ground portion, and the input ground portion are positioned on the second surface.

2. The balun of claim 1 , wherein a width of at least one of the first output ground portion and the second output power portion increases moving from the power junction portion to an edge of the second output port.

3. The balun of claim 1 , wherein a width of the input ground portion increases moving from the ground junction portion to an edge of the input port.

4. The balun of claim 1 , wherein a width of the input power portion decreases moving from the power junction portion to an edge of the input port.

5. The balun of claim 1 , wherein the first output power portion further comprises a protrusion portion extending outward from the first output power portion.

6. The balun of claim 1 , further comprising:

a center conductor portion; and

a recess, wherein:

the recess extends through a thickness of the second output port; and

the center conductor portion is at least partially positioned within the recess.

7. The balun of claim 6 , further comprising:

a via; and

a conductive element, wherein:

the via extends through a thickness of the center conductor portion; and

the conductive element is positioned at least partially within the via.

8. The balun of claim 1 , further comprising:

a plurality of vias; and

a plurality of conductive elements, wherein:

the plurality of vias extends through a thickness of the second output port and a thickness of the dielectric substrate; and

each of the plurality of conductive elements is positioned at least partially within a respective via of the plurality of vias.

9. An amplifier system comprising:

an amplifier; and

a balun, wherein the balun comprises a dielectric substrate defining a first surface and a second surface opposite the first surface, a first output port, a second output port, and an input port, and wherein:

the first output port comprises a first output ground portion and a first output power portion;

the second output port comprises a second output ground portion and a second output power portion;

the input port comprises an input ground portion and an input power portion;

the first output ground portion, the second output ground portion, and the input ground portion are coupled at a ground junction portion;

the first output power portion, the second output power portion, and the input power portion are coupled at a power junction portion;

the first output power portion, the second output power portion, and the input power portion are positioned on the first surface; and

the first output ground portion, the second output ground portion, and the input ground portion are positioned on the second surface.

10. The amplifier system of claim 9 , wherein a width of at least one of the first output power portion and the second output power portion increases moving from the power junction portion to an edge of the second output port.

11. The amplifier system of claim 9 , wherein a width of the input ground portion increases moving from the ground junction portion to an edge of the input port.

12. The amplifier system of claim 9 , wherein a width of the input power portion decreases moving from the power junction portion to an edge of the input port.

13. The amplifier system of claim 9 , wherein the first output power portion further comprises a protrusion portion extending outward from a centerline of the first output power portion.

14. The amplifier system of claim 9 , further comprising:

a center conductor portion; and

a recess, wherein:

the recess extends through a thickness of the second output port; and

the center conductor portion is at least partially positioned within the recess.

15. The amplifier system of claim 14 , further comprising:

a via; and

a conductive element, wherein:

the via extends through a thickness of the center conductor portion; and

the conductive element is positioned at least partially within the via.

16. The amplifier system of claim 9 , further comprising:

a plurality of vias; and

a plurality of conductive elements, wherein:

the plurality of vias extend through a thickness of the second output port and a thickness of the dielectric substrate; and

each of the plurality of conductive elements is positioned at least partially within a respective via of the plurality of vias.

17. The amplifier system of claim 9 , wherein the amplifier includes a direct current (DC) bias supply and a transistor.

18. A method of forming a balun, the method comprising:

forming a first output power portion, a second output power portion, an input power portion, and a power junction portion on a first surface of a dielectric substrate comprising the first surface and a second surface positioned opposite the first surface, wherein the power junction couples the first output power portion, the second output power portion, and the input power portion; and

forming a first output ground portion, a second output ground portion, an input ground portion, and a ground junction portion on the second surface, wherein the ground junction portion couples the first output ground portion, the second output ground portion, and the input ground portion, wherein:

a width of the second output power portion increases from the power junction portion to an edge of the second output power portion;

a width of the first output ground portion increases from the ground junction portion to an edge of the first output ground portion; and

a width of the input ground portion increases from the ground junction portion to an edge of the input ground portion.

19. The method of claim 18 , further comprising:

forming a recess, wherein the recess extends through a thickness of the second output power portion; and

positioning a center conductor portion within the recess.

20. The method of claim 19 , further comprising:

forming a via, wherein the via extends through a thickness of the center conductor portion; and

positioning a conductive element within the via.

21. The method of claim 18 , further comprising:

forming a plurality of vias; and

positioning a plurality of conductive elements within the plurality of vias, wherein each of the plurality of conductive elements is positioned within a respective via of the plurality of vias.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2025
From: CORNING OPTICAL COMMUNICATIONS LLC
To: ANI ACQUISITION SUB, LLC
Reel/Frame 071270/0328 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2025
From: CORNING RESEARCH & DEVELOPMENT CORPORATION
To: CORNING OPTICAL COMMUNICATIONS LLC
Reel/Frame 070629/0125 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2019
From: CUMANA MORALES, JESUS ANZOATEGUI
To: CORNING RESEARCH & DEVELOPMENT CORPORATION
Reel/Frame 051087/0924 →