Method of manufacture for single crystal capacitor dielectric for a resonance circuit
A method of manufacturing an integrated circuit. This method includes forming an epitaxial material comprising single crystal piezo material overlying a surface region of a substrate to a desired thickness and forming a trench region to form an exposed portion of the surface region through a pattern provided in the epitaxial material. Also, the method includes forming a topside landing pad metal and a first electrode member overlying a portion of the epitaxial material and a second electrode member overlying the topside landing pad metal. Furthermore, the method can include processing the backside of the substrate to form a backside trench region exposing a backside of the epitaxial material and the landing pad metal and forming a backside resonator metal material overlying the backside of the epitaxial material to couple to the second electrode member overlying the topside landing pad metal.
1. A method for fabricating an acoustic resonator device comprising:
providing a bulk substrate member, having a surface region, and a thickness of material, the bulk substrate having a first recessed region and a second recessed region, and a support member disposed between the first recessed region and the second recessed region;
forming a thickness of single crystal piezo material overlying the surface region, the thickness of single crystal piezo material having an exposed backside region configured with the first recessed region and a contact region configured with the second recessed region;
forming a via through the thickness of the single crystal piezo material in the contact region of the thickness of single crystal piezo material;
forming a metal pad in the via through the thickness of single crystal piezo material;
forming a first electrode member overlying an upper portion of the thickness of single crystal piezo material;
forming a second electrode member overlying a lower portion of the thickness of single crystal piezo material to sandwich the thickness of single crystal piezo material with the first electrode member and the second electrode member, the second electrode member extending from the lower portion that includes the exposed backside region to the contact region, the second electrode being coupled to the metal pad in the via through the thickness of single crystal piezo material;
forming a dielectric material overlying an upper surface region of a resulting structure overlying the bulk substrate member, wherein the resulting structure includes at least the first and second electrode members; and
forming an acoustic reflector structure configured overlying the first electrode member, the upper portion, the lower portion, and the second electrode member.
2. The method of claim 1 wherein the support member is configured in a plane coincident with a bottom surface region of the bulk substrate member.
3. The method of claim 1 wherein the support member is configured in a plane off-set and recessed in reference to a bottom surface region of the bulk substrate member.
4. The method of claim 1 wherein the single crystal piezo material being characterized by X-ray diffraction with clear peak at a detector angle (2-Theta) associated with single crystal film and whose Full Width Half Maximum (FWHM) is measured to be less than 1.0°.
5. The method of claim 1 material wherein the single crystal piezo material is selected from at least one of AlN, AlGaN, InN, BN, or other group III nitrides; and wherein the single crystal piezo material has a thickness of greater than 0.4 microns, the single crystal piezo material being characterized by a dislocation density of less than 10 12 defects/cm 2 .
6. The method of claim 1 further comprising
forming a first electrode terminal electrically coupled to the first electrode member; and
forming a second electrode terminal electrically coupled to the second electrode member.
7. The method of claim 1 wherein the first and second electrode members comprise a tantalum or molybdenum material; and wherein the substrate comprises silicon, gallium arsenide, gallium nitride, aluminum nitride, or aluminum oxide.