Switched-mode power controller with multi-mode startup
A switched-mode power controller includes a primary side controller circuit configured in a startup mode of operation to generate a fixed switching frequency pulse width modulation (PWM) signal with incrementing duty-ratio value. The PWM signal drives a main-switch that charges an inductive device with stored energy and discharges the stored energy into a capacitor on a secondary side to generate a power controller output voltage. Based on a comparison of the power controller output voltage with a reference voltage, the primary side controller circuit is configured to stop the incrementing of the duty-ratio of the PWM signal and begin a quasi-resonant mode of operation during which the primary side controller circuit reduces a number of valleys detected in one or more off-times of the main-switch in one or more respective main-switch switching periods.
1. A controller circuit, comprising:
a digital controller configured to generate, in a first mode of startup operation, a pulse width modulation (PWM) signal with an incrementing on-time duty-ratio value; and
a gate driver circuit configured to control a main-switch of a power converter using the PWM signal;
wherein, the digital controller is further configured to:
receive an indication of an output voltage of the power converter;
exit the first mode of startup operation when a difference between a reference voltage and the indication of the output voltage is not greater than an error window;
generate, in a second mode of startup operation, the PWM signal with a decreasing off-time duty-ratio value; and
exit the second mode of startup operation when a difference between the reference voltage and the indication of the output voltage is not greater than a predefined threshold voltage.
2. The controller circuit of claim 1 , wherein:
the digital controller is further configured to stop decreasing the off-time duty-ratio value of the PWM signal when the digital controller exits the second mode of startup operation.
3. The controller circuit of claim 2 , wherein the predefined threshold voltage is about 150 mV.
4. The controller circuit of claim 2 , wherein:
the digital controller is further configured to enter a third mode of operation when the digital controller exits the second mode of startup operation, the third mode of operation being a steady-state mode of operation.
5. The controller circuit of claim 1 , further comprising:
a feedback circuit;
wherein the digital controller is further configured, in the second mode of startup operation, to:
detect, using the feedback circuit, a number of valleys of a quasi-resonant oscillating signal during an off-time of the main-switch; and
decrease the off-time duty-ratio value of the PWM signal by reducing, in the second mode of startup operation, the number of valleys detected in one or more subsequent off-times of the main-switch in one or more switching periods of the main-switch.
6. The controller circuit of claim 5 , wherein:
the digital controller is further configured, in the second mode of startup operation, to reduce the number of valleys by one during each switching period of the main-switch.
7. The controller circuit of claim 1 , further comprising:
a decoder circuit configured to receive, using a communications link, an encoded digital data stream comprising digital representations of the output voltage and to generate a digital voltage value using the encoded digital data stream;
wherein the digital voltage value is used as the indication of the output voltage.
8. The controller circuit of claim 7 , wherein:
the decoder circuit receives, using the communications link, the encoded digital data stream from a secondary side of the power converter.
9. The controller circuit of claim 7 , wherein:
the encoded digital data stream further comprises a digital representation of the reference voltage; and
the decoder circuit generates the reference voltage using the encoded digital data stream.
10. The controller circuit of claim 7 , wherein:
the decoder circuit receives, using the communications link, the encoded digital data stream from the secondary side of the power converter after the output voltage has exceeded an under-voltage lockout threshold voltage value.
11. The controller circuit of claim 10 , wherein:
the decoder circuit does not receive the encoded digital data stream from a secondary side of the power converter before the output voltage has exceeded the under-voltage lockout threshold voltage value.
12. A method, comprising:
generating, in a first mode of startup operation of a controller circuit, a pulse width modulation (PWM) signal with an incrementing on-time duty-ratio value;
controlling a main-switch of a power converter based on the PWM signal;
receiving an indication of an output voltage of the power converter;
exiting the first mode of startup operation when a difference between a reference voltage and the indication of the output voltage is not greater than an error window;
generating, in a second mode of startup operation of the controller circuit, the PWM signal with a decreasing off-time duty-ratio value; and
exiting the second mode of startup operation when a difference between the reference voltage and the indication of the output voltage is not greater than a predefined threshold voltage.
13. The method of claim 12 , further comprising:
stopping a decrease of the off-time duty-ratio value of the PWM signal when the controller circuit exits the second mode of startup operation.
14. The method of claim 13 , further comprising:
entering a third mode of operation when the controller circuit exits the second mode of startup operation, the third mode of operation being a steady-state mode of operation.
15. The method of claim 12 , further comprising:
detecting, in the second mode of startup operation, a number of valleys of a quasi-resonant oscillating signal during an off-time of the main-switch; and
decreasing the off-time duty-ratio value of the PWM signal by reducing, in the second mode of startup operation, the number of valleys detected in one or more subsequent off-times of the main-switch in one or more switching periods of the main-switch.
16. The method of claim 15 , further comprising:
reducing, in the second mode of startup operation, the number of valleys by one during each switching period of the main-switch.
17. The method of claim 12 , further comprising:
receiving an encoded digital data stream comprising digital representations of the output voltage; and
generating a digital voltage value using the encoded digital data stream;
wherein the digital voltage value is used as the indication of the output voltage.
18. The method of claim 17 , wherein:
the encoded digital data stream is received by the controller circuit from a secondary side of the power converter.
19. The method of claim 17 , wherein:
the encoded digital data stream is received from a secondary side of the power converter after the output voltage has exceeded an under-voltage lockout threshold voltage value.
20. The method of claim 19 , wherein:
the encoded digital data stream is not received by the controller circuit from the secondary side of the power converter before the output voltage has exceeded the under-voltage lockout threshold voltage value.