Systems and methods for assessing electrical connectivity between elements of assay devices
Disclosed are devices, systems and methods for assessing the integrity of electrical connections between elements of interfacing electronic devices. In some aspects, a system includes an analysis device having electronics that interface with an assay cartridge inserted into the analysis device, wherein the analysis device is configured to conduct a preflight test in which impedance values for each circuit between the assay cartridge and analysis device are rearranged and assessed to determine the electrical connection integrity of the assay cartridge to the analysis device prior to implementing the assay.
1. An assay processing device, comprising:
an electronic unit to electronically interface with a printed circuit board (PCB) on an assay cartridge;
an impedance module comprising a signal generator and an impedance measurement device; and
an analysis module comprising a processor and memory, wherein the analysis module comprises a qualifier module, wherein the qualifier module comprises a fail criteria factor,
wherein, when the fail criteria factor is below a predetermined standard, the electronic unit is electrically connected with the PCB,
wherein the electronic unit comprises an electronic unit bay, and the qualifier module is configured to send a command signal for disabling the electronic unit bay when the fail criteria factor is above the predetermined standard.
2. The assay processing device of claim 1 , wherein, when the fail criteria factor is above the predetermined standard, the electronic unit is not electrically connected with the PCB.
3. The assay processing device of claim 1 , wherein the signal generator is configured to generate a voltage between 100-1000 kHz.
4. The assay processing device of claim 1 , wherein the qualifier module is configured to send a command signal for processing the PCB when the fail criteria factor is below the predetermined standard.
5. An assay processing device, comprising:
an electronic unit to electronically interface with a printed circuit board (PCB);
an impedance module comprising a signal generator and an impedance measurement device;
an analysis module comprising a processor and memory, wherein the analysis module comprises a qualifier module, wherein the qualifier module comprises a fail criteria factor; and
a graphical user interface configured to display a status of the electronical interface between the electronic unit and the PCB,
wherein the electronic unit comprises an electronic unit bay, and the qualifier module is configured to send a command signal for disabling the electronic unit bay when the fail criteria factor is above a predetermined standard.
6. The assay processing device of claim 5 , wherein, when the electronic unit measures impedance values below the predetermined standard, the status displayed on the graphical user interface is pass.
7. The assay processing device of claim 5 , wherein, when the status displayed on the graphical user interface is pass, the assay processing device is operable to start an assay without further user input.
8. The assay processing device of claim 5 , wherein, when the status displayed on the graphical user interface is fail, the graphical user interface is configured to further display a drop-down menu comprising a plurality of pre-populated choices.
9. The assay processing device of claim 5 , wherein the signal generator is configured to generate a voltage between 100-1000 kHz.
10. A method for assessing electrical connection integrity of an assay cartridge interfaced with an assay processing device, comprising:
(a) establishing an electrical connection between the assay cartridge and the assay processing device, wherein the assay processing device comprises an electronic unit bay;
(b) applying a voltage;
(c) measuring electrical signals to determine impedance values associated with at least two circuits between the assay cartridge and the assay processing device;
(d) analyzing the impedance values to identify (i) a short or (ii) an open, wherein, when the impedance values are below a predetermined standard, the assay cartridge is electrically connected with the assay processing device; and
(e) sending a command signal for disabling the electronic unit bay when the impedance values are above the predetermined standard.
11. The method of claim 10 , wherein the voltage is 100 kHz.
12. The method of claim 10 , wherein the voltage is between 100 kHz-1000 kHz.
13. The method of claim 10 , wherein the open or short is caused by a contaminant, and the contaminant is a liquid or a gel.
14. The method of claim 10 , wherein analyzing the impedance values further comprises re-ordering the impedance values and determining a quality factor,
wherein, when the quality factor is below the predetermined standard, the assay processing device is electrically connected with the assay cartridge.
15. The method of claim 10 , further comprising sending a display command signal for displaying, on a graphical user interface, a verification of the electrical connection between the assay cartridge and the assay processing device when the impedance values are below the predetermined standard.
16. A method for assessing electrical connection integrity of a printed circuit board (PCB) interfaced with a processing device, comprising:
(a) establishing an electrical connection between the PCB and the processing device, wherein the processing device includes a processing device bay;
(b) applying a voltage;
(c) measuring electrical signals to determine impedance values associated with at least two circuits between the PCB and the device processing device;
(d) analyzing the impedance values to identify (i) a short or (ii) an open, wherein, when the impedance values are below a predetermined standard, the PCB is electrically connected with the processing device; and
(e) sending a command signal for disabling the processing device bay when the impedance values are above the predetermined standard.
17. The method of claim 16 , wherein the voltage is between 100 kHz-1000 kHz.
18. The method of claim 16 , further comprising sending a display command signal for displaying, on a graphical user interface, a verification of the electrical connection between the PCB and the processing device when the impedance values are below the predetermined standard.
19. The method of claim 16 , wherein the open or short is caused by a contaminant, and the contaminant is a liquid or a gel.