Slope detection and correction for current sensing using on-state resistance of a power switch

1. A current estimation circuit for estimating current in a power switch during a conduction interval of the power switch, comprising:

a slope estimator configured to estimate a slope representative of the current in the power switch during a portion of the conduction interval that begins at or after a first delay from a turn-on transition of the power switch; and

a sampler circuit configured to generate a first sample, which corresponds to a first sensed voltage across the power switch at or after the first delay from the turn-on transition, and to generate a second sample, which corresponds to a second sensed voltage across the power switch, which is after the first sensed voltage,

wherein the current estimation circuit is configured to estimate current in the power switch over the conduction interval based on the first sample, the second sample, and the estimated slope.

2. The current estimation circuit of claim 1 , further comprising:

an updating circuit coupled to the slope estimator and the sampler circuit, and configured to generate a third sample based upon the first sample and the estimated slope,

wherein the current estimate is based on a combination of the second sample and the third sample.

3. The current estimation circuit of claim 2 ,

wherein the first sensed voltage corresponds to a first time instant and the second sensed voltage corresponds to a second time instant;

wherein the updating circuit comprises a first voltage node, which is initialized with a voltage corresponding to the first sample, and whose voltage is increased based upon the estimated slope for a time interval starting after the first time instant and lasting for the first delay.

4. The current estimation circuit of claim 1 , wherein a preliminary current estimate is based on a combination of the first sample and the second sample, and the preliminary current estimate is updated based on the slope estimate to yield the current estimate.

5. The current estimation circuit of claim 4 , wherein the combination of the first and the second samples is generated by latching the first and second samples, such that the preliminary estimate is an average of the first and second samples, and wherein the current estimation circuit comprises a summing amplifier configured to sum the average with a correction factor that is based on the estimated slope and the first delay.

6. The current estimation circuit of claim 1 , further comprising:

a voltage sensor configured to sense a voltage across load terminals of the power switch during the conduction interval, and to provide the sensed voltage, or a variant thereof, to the sampler circuit and the slope estimator.

7. The current estimation circuit of claim 1 , wherein the slope estimator comprises:

an amplifier having a first amplifier input, a second amplifier input, and an amplifier output, wherein a current at the amplifier output corresponds to an error in the slope estimate;

a first input switch configured to couple a sensed voltage across the power switch to the first amplifier input during the portion of the conduction interval that begins at or after the first delay from the turn-on transition; and

a second input switch configured to output an initial amplifier sample to the second amplifier input, the initial amplifier sample based upon a sampled sensed voltage at a time instant at or after the first delay from the turn-on transition of the power switch.

8. The current estimation circuit of claim 7 , wherein the slope estimator comprises a feedback circuit that couples a signal corresponding to the estimated slope to the second amplifier input.

9. The current estimation circuit of claim 7 , wherein the slope estimator comprises a current-setting transistor having a control terminal coupled to the amplifier output, and wherein a current in the current-setting transistor corresponds to the estimated slope.

10. The current estimation circuit of claim 9 , wherein the slope estimator comprises a current mirror configured to mirror the current in the current-setting transistor, and wherein the mirrored current provides the estimated slope that is used to estimate the current in the power switch.

11. The current estimation circuit of claim 1 , wherein the first delay includes a blanking interval, wherein a slope of a voltage across load terminals of the power switch is monotonic in an interval after the blanking interval and prior to a turn-off transition of the power switch.

12. A power conversion system, comprising:

a switching voltage converter having a power switch and an inductor, the power switch comprising a first load terminal and a second load terminal;

a current estimation circuit for estimating current in the power switch during a conduction interval of the power switch, comprising:

a slope estimator configured to estimate a slope representative of the current in the power switch during a portion of the conduction interval that begins at or after a first delay from a turn-on transition of the power switch; and

a sampler circuit configured to generate a first sample, which corresponds to a first sensed voltage across the power switch at or after the first delay from the turn-on transition, and to generate a second sample, which corresponds to a second sensed voltage across the power switch, which is after the first sensed voltage,

wherein the current estimation circuit is configured to estimate current in the power switch over the conduction interval based on the first sample, the second sample, and the estimated slope.

13. The power conversion system of claim 12 , wherein the current estimation circuit further comprises:

a voltage sensor configured to sense a voltage across the load terminals of the power switch during the conduction interval, and to provide the sensed voltage, or a variant thereof, to the sampler circuit and the slope estimator.

14. The power conversion system of claim 12 , wherein the switching voltage converter is a buck converter, the power switch is a low-side switch of the buck converter, and the buck converter further comprises a high-side switch.

15. The power conversion system of claim 14 , wherein the estimated current in the inductor is based upon the estimated slope, and wherein the estimated slope corresponds to a current in the low-side switch when the low-side switch is conducting.

16. A method for estimating current in a power switch having a switch voltage between first and second load terminals of the power switch, the method comprising:

turning on the power switch at a turn-on transition;

turning off the power switch at a turn-off transition;

estimating a slope representative of the current in the power switch between a first time instant, which is a first delay after the turn-on transition, and a second time instant, which is after the first time instant and at or before the turn-off transition;

sampling the switch voltage at a first sample time that is at or after the first delay after the turn-on transition, resulting in a first sampled voltage;

sampling the switch voltage at a second sample time that is after the first sample time and at or before the turn-off transition, resulting in a second sampled voltage;

outputting an estimated current based on the first sampled voltage, the second sampled voltage, and the estimated slope.

17. The method of claim 16 , further comprising:

updating the first sampled voltage based on the estimated slope; and

combining the second sampled voltage and the updated first sampled voltage to generate the estimated current.

18. The method of claim 16 , further comprising:

generating a preliminary current estimate based on a combination of the first sampled voltage and the second sampled voltage; and

updating the preliminary current estimate based on the slope estimate and the first delay to generate the estimated current.