IP Library Granted Patent US 10,784,232
Granted Patent B2
US 10,784,232 · App. 16/700,592 · Granted Sep 22, 2020

Semiconductor package and fabricating method thereof

Inventors: David Hiner (Chandler, AZ); Michael Kelly (Queen Creek, AZ); Ronald Huemoeller (Gilbert, AZ)
Assignee: Amkor Technology, Inc.
H01L25/0655H01L21/56H01L21/561H01L21/563H01L21/568H01L21/6835H01L23/3128H01L23/3135H01L23/3185H01L23/5383H01L23/5385H01L23/5386H01L24/14H01L24/16H01L24/73H01L24/97H01L25/50H01L21/486H01L23/49816H01L2221/68345H01L2224/1403H01L2224/16225H01L2224/16227H01L2224/18H01L2224/73204H01L2224/81005H01L2224/95001H01L2224/97
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Quick Facts
Patent No.
US 10,784,232
App. No.
16/700,592
Granted
Sep 22, 2020
Kind
B2
Abstract

A semiconductor package structure and a method for making a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a connect die that routes electrical signals between a plurality of other semiconductor die.

Claims (27)

1. An electronic device comprising:

a first signal redistribution structure;

a first vertical interconnection structure on a first side of the first signal redistribution structure;

a connect die comprising a back side and a front side, wherein the back side is facing and is coupled to the first side of the first signal redistribution structure;

a first connect die interconnection structure coupled to the front side of the connect die; and

a second signal redistribution structure on the first vertical interconnection structure and on the first connect die interconnection structure.

2. The electronic device of claim 1 , comprising:

a second vertical interconnection structure on the first side of the first signal redistribution structure; and

a second connect die interconnection structure coupled to the front side of the connect die, wherein the second connect die interconnection structure is electrically coupled to the first connect die interconnection structure.

3. The electronic device of claim 1 , comprising a first encapsulating material that covers the first side of the first signal redistribution structure and laterally surrounds the first vertical interconnection structure and the first connect die interconnection structure.

4. The electronic device of claim 3 , wherein the first encapsulating material laterally surrounds the connect die.

5. The electronic device of claim 3 , wherein a first side of the first encapsulating material is coplanar with an end surface of the first vertical interconnection structure and an end surface of the first connect die interconnection structure.

6. The electronic device of claim 5 , wherein a first lateral side of the first signal redistribution structure, a first lateral side of the second signal redistribution structure, and a first lateral side of the first encapsulating material are coplanar.

7. The electronic device of claim 5 , comprising a second encapsulating material that covers the second signal redistribution structure.

8. The electronic device of claim 7 , wherein a first lateral side of the first signal redistribution structure, a first lateral side of the second signal redistribution structure, a first lateral side of the first encapsulating material, and a first lateral side of the second encapsulating material are coplanar.

9. The electronic device of claim 1 , wherein the back side of the connect die is free of electrical connections.

10. The electronic device of claim 1 , wherein at least a portion of the connect die is above a topmost surface of the first signal distribution structure.

11. The electronic device of claim 1 , wherein the volume directly vertically between the first and second signal redistribution structures is free of active electronic components.

12. The electronic device of claim 1 , wherein the first and second signal redistribution structures are coreless.

13. The electronic device of claim 1 , wherein the connect die is a portion of a wafer or panel of connect dies.

14. The electronic device of claim 1 , further comprising a second connect die coupled to the first side of the first signal redistribution structure.

15. The electronic device of claim 1 , wherein the connect die comprises electrical routing circuitry without active electronic components and without passive electronic components.

16. The electronic device of claim 1 , wherein the connect die comprises a passive electronic component.

17. The electronic device of claim 16 , wherein the passive electronic component is a resistor.

18. The electronic device of claim 16 , wherein the passive electronic component is a capacitor or inductor.

19. The electronic device of claim 16 , wherein the passive electronic component is an integrated passive device.

20. The electronic device of claim 1 , wherein the connect die comprises no active electronic components.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2023
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
Reel/Frame 063486/0293 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2023
From: HINER, DAVID; KELLY, MICHAEL; HUEMOELLER, RONALD
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 063460/0602 →
Continuity (6)
Continuation 16213769 · Dec 7, 2018
Continuation In Part 15707646 · Sep 18, 2017
Continuation In Part 15594313 · May 12, 2017
Continuation 15207186 · Jul 11, 2016
Provisional Application 62287544 · Jan 27, 2016
Related Publication 20200227385A1 · Jul 16, 2020
Cited By (4)
US 12,355,000 US 12,469,811 US 12,519,046 US 12,628,672