IP Library Granted Patent US 11,507,818
Granted Patent B2
US 11,507,818 · App. 16/703,278 · Granted Nov 22, 2022

Optoelectronic computing systems

Inventors: Arash Hosseinzadeh (Andover, MA); Yelong Xu (Allston, MA); Yanfei Bai (Shanghai, CN); Huaiyu Meng (Medford, MA); Ronald Gagnon (North Grafton, MA); Cheng-Kuan Lu (Littleton, MA); Jonathan Terry (Cambridge, MA); Jingdong Deng (Acton, MA); Maurice Steinman (Marlborough, MA); Yichen Shen (Cambridge, MA)
Assignee: LIGHTELLIGENCE PTE. LTD.
G06N3/0675G02F1/225G06F17/16G06N3/04G02F1/212G02F2203/15
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Quick Facts
Patent No.
US 11,507,818
App. No.
16/703,278
Granted
Nov 22, 2022
Kind
B2
Abstract

A system includes a first unit configured to generate a plurality of modulator control signals, and a processor unit. The processor unit includes: a light source or port configured to provide a plurality of light outputs, and a first set of optical modulators coupled to the light source or port and the first unit. The optical modulators in the first set are configured to generate an optical input vector by modulating the plurality of light outputs provided by the light source or port based on digital input values corresponding to a first set of modulator control signals in the plurality of modulator control signals, the optical input vector comprising a plurality of optical signals. The processor unit also includes a matrix multiplication unit that includes a second set of optical modulators. The matrix multiplication unit is coupled to the first unit, and is configured to transform the optical input vector into an analog output vector based on a plurality of digital weight values corresponding to a second set of modulator control signals in the plurality of modulator control signals applied to the second set of optical modulators. At least one optical modulator of at least one of the first set of optical modulators or the second set of optical modulators is configured to modulate an optical signal based on a first modulator control signal among the plurality of modulator control signals, and the first unit is configured to shape the first modulator control signal to include bandwidth-enhancement associated with a change in amplitude associated with a corresponding change in successive digital values corresponding to the first modulator control signal.

Claims (33)

1. A system, comprising:

a first unit configured to generate a plurality of modulator control signals;

a processor unit comprising:

a light source or port configured to provide a plurality of light outputs;

a first set of optical modulators coupled to the light source or port and the first unit, the optical modulators in the first set being configured to generate an optical input vector by modulating the plurality of light outputs provided by the light source or port based on digital input values corresponding to a first set of modulator control signals in the plurality of modulator control signals, the optical input vector comprising a plurality of optical signals; and

a matrix multiplication unit comprising a second set of optical modulators, in which the matrix multiplication unit is coupled to the first unit, and the matrix multiplication unit is configured to transform the optical input vector into an analog output vector based on a plurality of digital weight values corresponding to a second set of modulator control signals in the plurality of modulator control signals applied to the second set of optical modulators,

wherein at least one optical modulator of at least one of the first set of optical modulators or the second set of optical modulators is configured to modulate an optical signal based on a first modulator control signal among the plurality of modulator control signals, and the first unit is configured to shape the first modulator control signal to include bandwidth-enhancement associated with a change in amplitude associated with a corresponding change in successive digital values corresponding to the first modulator control signal.

2. The system of claim 1 , further comprising:

a second unit coupled to the matrix multiplication unit and configured to convert the analog output vector into a digitized output vector; and

a controller comprising integrated circuitry configured to perform operations comprising:

receiving an artificial neural network computation request comprising an input dataset that comprises a first digital input vector;

receiving a first plurality of neural network weights; and

generating, through the first unit, a first plurality of modulator control signals based on the first digital input vector and a first plurality of weight control signals based on the first plurality of neural network weights.

3. The system of claim 1 in which the first unit comprises a digital to analog converter (DAC).

4. The system of claim 2 , comprising a memory unit configured to store a dataset and a plurality of neural network weights.

5. The system of claim 4 in which the integrated circuitry of the controller is further configured to perform operations comprising storing, in the memory unit, the input dataset and the first plurality of neural network weights.

6. The system of claim 2 in which the controller comprises an application specific integrated circuit (ASIC), and

receiving an artificial neural network computation request comprises receiving, from a general purpose data processor, an artificial neural network computation request.

7. The system of claim 2 in which the first unit, the processing unit, the second unit, and the controller are disposed on at least one of a multi-chip module or an integrated circuit, and

receiving an artificial neural network computation request comprises receiving, from a second data processor, an artificial neural network computation request, wherein the second data processor is external to the multi-chip module or the integrated circuit, the second data processor is coupled to the multi-chip module or the integrated circuit through a communication channel, and the processor unit can process data at a data rate that is at least an order of magnitude greater than a data rate of the communication channel.

8. The system of claim 2 in which the first unit, the processor unit, the second unit, and the controller are used in an optoelectronical processing loop that is repeated for a plurality of iterations, and the optoelectronical processing loop includes:

(1) at least a first optical modulation operation based on at least one of the plurality of modulator control signals, and at least a second optical modulation operation based on at least one of the weight control signals, and

(2) at least one of (a) an electrical summation operation or (b) an electrical storage operation.

9. The system of claim 8 in which the optoelectronical processing loop includes the electrical storage operation, and the electrical storage operation is performed using a memory unit coupled to the controller,

wherein the operations performed by the controller further comprise storing, in the memory unit, the input dataset and the first plurality of neural network weights.

10. The system of claim 8 in which the optoelectronical processing loop includes the electrical summation operation, and the electrical summation operation is performed using an electrical summation module within the matrix multiplication unit,

wherein the electrical summation module is configured to generate an electrical current corresponding to an element of the analog output vector that represents a sum of respective elements of the optical input vector multiplied by respective neural network weights.

11. The system of claim 1 in which the first modulator control signal comprises an analog signal associated with a plurality of predetermined amplitude levels, and each amplitude level is associated with a different corresponding digital value.

12. The system of claim 11 in which the first modulator control signal comprises an analog signal associated with two predetermined amplitude levels, and each amplitude level is associated with a different corresponding binary value.

13. The system of claim 12 in which the successive digital values comprise successive binary values in a series of binary values.

14. The system of claim 13 in which the controller is configured to shape the first modulator control signal to include bandwidth-enhancement by increasing a size of an amplitude change between a first of the predetermined amplitude levels associated with a first time interval and a second of the predetermined amplitude levels associated with a second time interval for an initial portion of the second time interval.

15. The system of claim 13 in which the series of binary values are used to determine an amplitude level of the first modulator control signal used to modulate the optical signal according to a non-return-to-zero (NRZ) modulation pattern.

16. The system of claim 13 in which the first unit is configured to shape the first modulator control signal to include bandwidth-enhancement by pumping current between a diode structure of a first modulator among the second set of optical modulators and a capacitor connected in series between the diode structure and a circuit providing the first modulator control signal, and a quantity of charge transferred by the pumped current is determined based at least in part on a voltage that is constant over a time period in which the successive digital values are provided.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE SPELLING OF THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 057911 FRAME: 0512. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 11, 2022
From: LIGHTELLIGENCE, INC.
To: LIGHTELLIGENCE PTE. LTD.
Reel/Frame 059928/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2021
From: LIGHTELLIGENCE, INC.
To: LIGHTELLIGENCE PTE LTD.
Reel/Frame 057911/0512 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2020
From: HOSSEINZADEH, ARASH; XU, YELONG; BAI, YANFEI; MENG, HUAIYU; GAGNON, RONALD; LU, CHENG-KUAN; TERRY, JONATHAN; DENG, JINGDONG; STEINMAN, MAURICE; SHEN, YICHEN
To: LIGHTELLIGENCE, INC.
Reel/Frame 052173/0250 →
Continuity (6)
Continuation In Part 16431167 · Jun 4, 2019
Provisional Application 62820562 · Mar 19, 2019
Provisional Application 62792144 · Jan 14, 2019
Provisional Application 62744706 · Oct 12, 2018
Provisional Application 62680944 · Jun 5, 2018
Related Publication 20200110992A1 · Apr 9, 2020
Cited By (8)
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