IP Library Granted Patent US 11,367,488
Granted Patent B2
US 11,367,488 · App. 16/711,003 · Granted Jun 21, 2022

Memory system and method for read operation based on grouping of word lines

Inventors: Aman Bhatia (San Jose, CA); Chenrong Xiong (San Jose, CA); Fan Zhang (Fremont, CA); Naveen Kumar (San Jose, CA); Xuanxuan Lu (San Jose, CA); Yu Cai (San Jose, CA)
Assignee: SK hynix Inc.
G11C16/26G06F12/10G11C16/0483G11C16/08G11C16/30G06F2212/2022G11C11/5621
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Quick Facts
Patent No.
US 11,367,488
App. No.
16/711,003
Granted
Jun 21, 2022
Kind
B2
Abstract

A memory system includes a memory device and a controller. The controller determines a target word line group to which a target word line corresponding to a read command belongs. The controller identifies a reference voltage corresponding to the target word line group. The controller controls the memory device to perform a read operation on a target page coupled to the target word line, using the reference voltage.

Claims (48)

1. A memory system comprising:

a memory device including a plurality of pages coupled to a plurality of word lines; and

a controller, coupled to the memory device, suitable for:

receiving a read command from a host;

determining a target word line group to which a target word line corresponding to the read command belongs, among a plurality of word line groups, which include respective subsets of the plurality of word lines;

identifying a reference voltage corresponding to the target word line group, among a plurality of reference voltages; and

controlling the memory device to perform a read operation on a target page coupled to the target word line, among the plurality of pages, using the reference voltage,

wherein the plurality of word line groups are generated based on at least one of the number of bit errors and decoding failure rates for the plurality of word lines.

2. The memory system of claim 1 , wherein the controller translates a logical address corresponding to the read command into a physical address, and determines the target word line group based on the physical address.

3. The memory system of claim 1 , wherein the controller includes a memory storing the plurality of reference voltages in association with the plurality of word line groups, a respective reference voltage corresponding to a respective word line group in a one-to-one relationship.

4. The memory system of claim 1 , further comprising:

generating the plurality of word line groups based the number of bit errors and decoding failure rates for a combination of the plurality of word lines and logical pages coupled to the plurality of word lines.

5. The memory system of claim 4 , wherein the plurality of word line groups includes a first word line group in which all word lines have a first characteristic, and a second word line group in which all word lines have a second characteristic.

6. The memory system of claim 1 , wherein the controller provides the memory device with information on the reference voltage, and

wherein the memory device includes a voltage generation circuit, which receives the information from the controller, generates the reference voltage and provides the target word line with the reference voltage.

7. A method for operating a memory system comprising:

receiving a read command from a host;

determining a target word line group to which a target word line corresponding to the read command belongs, among a plurality of word line groups, which include respective subsets of a plurality of word lines to which a plurality of pages are coupled;

identifying a reference voltage corresponding to the target word line group, among a plurality of reference voltages; and

controlling the memory device to perform a read operation on a target page coupled to the target word line, among the plurality of pages, using the reference voltage,

wherein the plurality of word line groups are generated based on at least one of the number of bit errors and decoding failure rates for the plurality of word lines.

8. The method of claim 7 , wherein the determining of the target word line group comprises:

translating a logical address corresponding to the read command into a physical address; and

determining the target word line group based on the physical address.

9. The method of claim 7 , further comprising:

storing, in a memory, the plurality of reference voltages in association with the plurality of word line groups, a respective reference voltage corresponding to a respective word line group in a one-to-one relationship.

10. The method of claim 7 , further comprising:

generating the plurality of word line groups based on the number of bit errors and decoding failure rates for a combination of the plurality of word lines and logical pages coupled to the plurality of word lines.

11. The method of claim 10 , wherein the plurality of word line groups includes a first word line group in which all word lines have a first characteristic, and a second word line group in which all word lines have a second characteristic.

12. The method of claim 7 , wherein the controlling of the memory device to perform the read operation comprises:

providing, by a controller, a memory device with information on the reference voltage;

receiving, by a voltage generation circuit of the memory device, the information from the controller;

generating, by the voltage generation circuit, the reference voltage; and

providing, by voltage generation circuit, the target word line with the reference voltage.

13. A memory system comprising:

a memory device including a plurality of pages coupled to a plurality of word lines; and

a controller coupled to the memory device, suitable for:

generating a plurality of word line groups based on at least one of the number of bit errors and decoding failure rates for the plurality of word lines;

receiving a read command from a host;

determining a target word line group to which a target word line corresponding to the read command belongs, among the plurality of word line groups, which include respective subsets of the plurality of word lines;

identifying a reference voltage corresponding to the target word line group, among a plurality of reference voltages; and

controlling the memory device to perform a read operation on a target page coupled to the target word line, among the plurality of pages, using the reference voltage,

wherein the plurality of word line groups is generated based on at least one of the number of bit errors and decoding failure rates for a combination of the plurality of word lines and logical pages coupled to the plurality of word lines.

14. The memory system of claim 13 , wherein the controller translates a logical address corresponding to the read command into a physical address, and determines the target word line group based on the physical address.

15. The memory system of claim 13 , wherein the controller includes a memory storing the plurality of reference voltages in association with the plurality of word line groups, a respective reference voltage corresponding to a respective word line group in a one-to-one relationship.

16. The memory system of claim 13 , wherein the plurality of word line groups includes a first word line group in which all word lines have a first characteristic, and a second word line group which all word lines have a second characteristic.

17. The memory system of claim 13 , wherein the controller provides the memory device with information on the reference voltage, and

wherein the memory device includes a voltage generation circuit, which receives the information from the controller, generates the reference voltage and provides the target word line with the reference voltage.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2021
From: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
To: SK HYNIX INC.
Reel/Frame 056883/0151 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2021
From: XIONG, CHENRONG
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 055566/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2019
From: BHATIA, AMAN; ZHANG, FAN; KUMAR, NAVEEN; LU, XUANXUAN
To: SK HYNIX MEMORY SOLUTIONS AMERICA INC.
Reel/Frame 051251/0841 →
Continuity (2)
Provisional Application 62777840 · Dec 11, 2018
Related Publication 20200185040A1 · Jun 11, 2020
Cited By (1)
US 12,210,759