IP Library Granted Patent US 11,105,679
Granted Patent B2
US 11,105,679 · App. 16/711,832 · Granted Aug 31, 2021

Extended hold-off time for SPAD quench assistance

Inventors: Mohammed Al-Rawhani (Glasgow, GB); Bruce Rae (Edinburgh, GB)
Assignee: STMicroelectronics (Research & Development) Limited
G01J1/44G01J2001/442G01J2001/4466
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Quick Facts
Patent No.
US 11,105,679
App. No.
16/711,832
Granted
Aug 31, 2021
Kind
B2
Abstract

A photodetection circuit includes a single photon avalanche diode (SPAD), and an active quenching circuit coupling the SPAD to an intermediate node and having a variable RC constant. The variable RC constant provides a first RC constant during an idle state so that when the SPAD detects a photon, the SPAD avalanches to begin quenching to set a magnitude of a voltage at a terminal of the SPAD to a quench voltage, the quench voltage being greater than a threshold voltage; a second RC constant greater than the first RC constant during a hold off period during which the quenching occurs so as to maintain the voltage at the terminal of the SPAD at a magnitude that is above the threshold voltage during the hold off period; and a third RC constant less than the second RC constant but greater than the first RC constant during a recharge period during which the SPAD is recharged.

Claims (45)

1. A photodetection circuit, comprising:

a single photon avalanche diode (SPAD); and

an active quenching circuit coupling the SPAD to an intermediate node, the active quenching circuit having a variable RC constant, the active quenching circuit configured to:

have a first RC constant during an idle state so that when the SPAD avalanches in response to detection of a photon, quenching is begun so as to set a magnitude of a voltage at a terminal of the SPAD to a quench voltage, the quench voltage being greater than a threshold voltage;

have a second RC constant greater than the first RC constant during a hold off period during which the quenching occurs so as to maintain the voltage at the terminal of the SPAD at a magnitude that is above the threshold voltage during the hold off period; and

have a third RC constant less than the second RC constant but greater than the first RC constant during a recharge period during which the SPAD is recharged.

2. The photodetection circuit of claim 1 , wherein the magnitude that is above the threshold voltage during the hold off period is substantially equal to the quench voltage.

3. The photodetection circuit of claim 1 , wherein the active quenching circuit comprises a starved delayed buffer.

4. The photodetection circuit of claim 3 ,

wherein the SPAD has a cathode coupled to a high voltage supply and an anode;

wherein the starved delayed buffer comprises:

an inverter having an input coupled to the anode of the SPAD;

a starved inverter having an input coupled to the intermediate node to receive an output of the inverter;

a logic gate having a first input coupled to the intermediate node and a second input coupled to an output of the starved inverter;

a transistor circuit coupled between the anode of the SPAD and ground and configured to turn on in response to assertion of an output of the logic gate; and

a pull down circuit coupled to the input of the inverter and configured to have a variable resistance controlled by the output of the starved inverter.

5. The photodetection circuit of claim 4 , wherein the transistor circuit comprises:

a first n-channel transistor having a drain coupled to the input of the inverter, a source coupled to ground, and a gate coupled to the output of the logic gate.

6. The photodetection circuit of claim 5 , wherein the transistor circuit further comprises:

an enable n-channel transistor having a drain coupled to the anode of the SPAD, a source coupled to the input of the inverter, and a gate coupled to an enable signal.

7. The photodetection circuit of claim 5 , wherein the pull down circuit comprises:

a second n-channel transistor having a drain coupled to the input of the inverter, a source coupled to ground, and a gate coupled to the output of the starved inverter.

8. The photodetection circuit of claim 4 , wherein the logic gate comprises an OR gate.

9. The photodetection circuit of claim 4 , wherein the starved inverter is powered between a current source and ground; and wherein the current source comprises a p-channel transistor biased by a tuning voltage.

10. The photodetection circuit of claim 1 , wherein the SPAD comprises a fully depleted SPAD.

11. A method, comprising:

changing an RC constant of an active quenching circuit for a single photon avalanche diode (SPAD) to:

have a first RC constant during an idle state so that when the SPAD avalanches in response to detection of a photon, quenching is begun so as to set a magnitude of a voltage at a terminal of the SPAD to a quench voltage, the quench voltage being greater than a threshold voltage;

have a second RC constant greater than the first RC constant during a hold off period during which the quenching occurs so as to maintain the voltage at the terminal of the SPAD at a magnitude that is above the threshold voltage during the hold off period; and

have a third RC constant less than the second RC constant but greater than the first RC constant during a recharge period during which the SPAD is recharged.

12. The method of claim 11 , wherein the magnitude that is above the threshold voltage during the hold off period is substantially equal to the quench voltage.

13. A photodetection circuit, comprising:

a single photon avalanche diode (SPAD); and

an active quenching circuit coupling the SPAD to an intermediate node, the active quenching circuit having a variable RC constant, the active quenching circuit configured to:

have a first RC constant during an idle state so that when the SPAD avalanches in response to detection of a photon, quenching is begun to set a magnitude of a voltage at a terminal of the SPAD to a quench voltage, the quench voltage being greater than a threshold voltage; and

have a second RC constant greater than the first RC constant during a hold off period during which the quenching occurs so as to maintain the voltage at the terminal of the SPAD at a magnitude that is above the threshold voltage during the hold off period.

14. The photodetection circuit of claim 13 , wherein the magnitude that is above the threshold voltage during the hold off period is substantially equal to the quench voltage.

15. The photodetection circuit of claim 13 , wherein the active quenching circuit comprises a starved buffer.

16. The photodetection circuit of claim 15 ,

wherein the SPAD has a cathode coupled to a high voltage supply and an anode; and

wherein the starved buffer comprises:

an inverter having an input coupled to the anode of the SPAD;

a starved inverter having an input coupled to the intermediate node to receive an output of the inverter; and

a pull down circuit coupled to the input of the inverter and configured to have a variable resistance controlled by the output of the starved inverter.

17. The photodetection circuit of claim 13 , wherein the SPAD comprises a fully depleted SPAD.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2020
From: AL-RAWHANI, MOHAMMED; RAE, BRUCE
To: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
Reel/Frame 053900/0322 →
Continuity (1)
Related Publication 20210181016A1 · Jun 17, 2021