Systems, methods, and devices for pre-charge control of a battery module
The present subject matter relates to a battery module for use in a vehicle. The battery module may include a housing, a plurality of battery cells disposed within the housing, and solid state pre-charge control circuitry that pre-charges a direct current (DC) bus that may be coupled between the battery module and an electronic component of the vehicle. Furthermore, the solid state pre-charge control circuitry may include solid state electronic components as well as passive electronic components.
1. A battery module for use in a vehicle, comprising:
a housing;
a plurality of battery cells disposed in the housing; and
solid state pre-charge control circuitry configured to:
pre-charge a direct current (DC) bus coupled between the battery module and an electronic component of the vehicle;
detect a presence of a short circuit across the DC bus while the pre-charge control circuitry pre-charged the DC bus; and
limit a current generated from an output of a predetermined voltage from the plurality of battery cells disposed in the housing.
2. The battery module of claim 1 , comprising a printed circuit board (PCB) disposed in the housing, wherein the solid state pre-charge control circuitry is mounted on the PCB.
3. The battery module of claim 2 , wherein the PCB comprises an override system configured to provide an override signal to the solid state pre-charge control circuitry, and wherein the override signal disables the solid state pre-charge control circuitry.
4. The battery module of claim 1 , wherein the solid state pre-charge control circuitry comprises:
a transistor configured to receive an input signal indicative of a pre-charge initiation request, wherein the transistor is configured to activate to provide a low resistance path between the plurality of battery cells and a ground upon receiving the pre-charge initiation request;
a power transistor coupled between the plurality of battery cells and the DC bus and configured to create a path from the plurality of battery cells to the DC bus when the transistor is activated; and
a voltage divider configured to receive an output of the power transistor and to output a pre-charge voltage to the DC bus to pre-charge the DC bus.
5. The battery module of claim 4 , wherein the power transistor comprises a power metal-oxide-semiconductor field effect transistor (MOSFET).
6. The battery module of claim 4 , wherein the voltage divider comprises a first set of resistors and a second set of resistors, and wherein a first resistance of the first set of resistors is substantially smaller than a second resistance of the second set of resistors.
7. The battery module of claim 6 , wherein the first set of resistors is disposed between the output of the power transistor and the second set of resistors, and wherein the second set of resistors is disposed between the first set of resistors and ground.
8. The battery module of claim 1 , wherein the solid state pre-charge control circuitry is configured to take a first voltage reading upon initially applying a voltage to pre-charge the DC bus and a second voltage reading after a predetermined amount of time has passed, and wherein substantially similar voltage levels in the first voltage reading and the second voltage reading indicate the short circuit is present.
9. The battery module of claim 8 , wherein the second voltage reading occurs within approximately 30 ms of the first voltage reading.
10. The battery module of claim 1 , wherein the solid state pre-charge control circuitry is configured to limit current received at the DC bus during a pre-charge.
11. The battery module of claim 1 , wherein the predetermined voltage is 48V.
12. A battery module for use in a vehicle, the battery module comprising:
a housing;
a plurality of battery cells disposed in the housing;
an override system configured to generate an override signal; and
a printed circuit board (PCB) disposed in the housing, the PCB having solid state pre-charge control circuitry configured to pre-charge a direct current (DC) bus coupled between the battery module and an electronic component of the vehicle, the pre-charge control circuitry comprising:
a transistor configured to receive an input signal indicative of a pre-charge initiation request, the transistor being configured to activate to provide a low resistance path between the plurality of battery cells and a ground upon receiving the pre-charge initiation request;
a power metal-oxide-semiconductor field effect transistor (MOSFET) coupled between the plurality of battery cells and the DC bus and configured to create a path from the plurality of battery cells to the DC bus when the transistor is activated;
a voltage divider configured to receive an output of the power MOSFET and to output a pre-charge voltage to the DC bus to pre-charge the DC bus; and
an AND gate, the AND gate being configured to:
receive the input signal, and the override signal from the override system of the battery module; and
disable the pre-charge control circuitry upon receiving a disable indication from the override system of the battery module.
13. The battery module of claim 12 , wherein the voltage divider comprises:
a first set of resistors coupled to the output of the power MOSFET and the DC bus; and
a second set of resistors coupled to the DC bus and the ground, wherein the second set of resistors has a resistance substantially larger than that of the first set of resistors.
14. The battery module of claim 13 , wherein the first set of resistors comprises two or more individual resistors positioned separately on the PCB.
15. The battery module of claim 12 , wherein the pre-charge control circuitry is configured to detect a short circuit across the DC bus by collecting a first voltage reading across the DC bus and a second voltage reading across the DC bus and providing an indication of a presence of the short circuit across the DC bus when substantially similar voltage levels of the first and second voltage readings occur.
16. The battery module of claim 12 , wherein the pre-charge control circuitry is configured to collect the second voltage reading less than approximately 30 ms after the first voltage reading.
17. The battery module of claim 12 , wherein the pre-charge control circuitry further comprises a diode disposed between the power MOSFET and the voltage divider, and wherein the diode is configured to prevent back-feeding of power to the pre-charge control circuitry from the DC bus.
18. A method, comprising:
receiving an input signal indicative of a pre-charge initiation request via a pre-charge control circuit disposed on a printed circuit board (PCB) of a battery module disposed in a vehicle;
applying, via the pre-charge control circuit, a voltage from a plurality of battery cells in the battery module to a direct current (DC) bus when the input signal is received;
collecting a first reading of a voltage across the DC bus;
collecting a second reading of the voltage across the DC bus at a predetermined time after collecting the first reading;
comparing the first and second readings;
receiving an indication of whether an override is enabled from an override system of the battery module disposed in the vehicle; and
ceasing to apply the voltage from the plurality of battery cells to the DC bus when at least one of:
there is substantially no difference between the first and second readings; and
an indication is received that the override is enabled.
19. The method of claim 18 , wherein applying the voltage from the plurality of battery cells to the DC bus comprises:
activating a transistor of the pre-charge control circuit to provide a low resistance path between the plurality of battery cells in the battery module and a ground when the input signal is received;
creating, via a power metal-oxide-semiconductor field effect transistor (MOSFET), a path from the plurality of battery cells to the DC bus when the transistor is activated;
providing an output of the power MOSFET to a voltage divider; and
outputting a pre-charge voltage from the voltage divider to the DC bus to pre-charge the DC bus.
20. The method of claim 18 , wherein the second voltage reading is collected within approximately 30 ms after the first voltage reading is collected.