Multilayer electronic device including a high precision inductor
A multilayer electronic device may include a plurality of dielectric layers and a signal path having an input and an output. An inductor may include a conductive layer formed on one of the plurality of dielectric layers and may be electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground. The inductor may include an outer perimeter that includes a first straight edge facing outward in a first direction and a second straight edge parallel to the first straight edge and facing outward in the first direction. The second straight edge may be offset from the first straight edge by an offset distance that is less than about 500 microns and less than about 90% of a first width of the inductor in the first direction at the first straight edge.
1. A multilayer electronic device comprising:
a plurality of dielectric layers;
a signal path having an input and an output; and
an inductor comprising a conductive layer overlying one of the plurality of dielectric layers, and wherein the inductor is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground, and wherein:
the inductor has an outer perimeter comprising a first straight edge that faces outward in a first direction and a second straight edge that is parallel to the first straight edge and faces outward in the first direction;
the second straight edge is offset from the first straight edge in the first direction by an offset distance that is less than about 500 microns and less than about 90% of a first width of the inductor in the first direction at the first straight edge; and
the inductor has a second width at the second straight edge in the first direction, and wherein a ratio of the second width to the first width ranges from about 1.02 to about 1.9.
2. The multilayer electronic device of claim 1 , further comprising a dielectric material that comprises an epoxy.
3. The multilayer electronic device of claim 1 , wherein the outer perimeter comprises a width discontinuity edge extending between the first straight edge and the second straight edge.
4. The multilayer electronic device of claim 3 , wherein the width discontinuity edge is perpendicular to the first straight edge and second straight edge.
5. The multilayer electronic device of claim 3 , wherein the width discontinuity edge is spaced apart from a corner of a longitudinal centerline of the inductor by at least about 30 microns.
6. The multilayer electronic device of claim 1 , wherein the offset distance is approximately equal to a minimum line width.
7. The multilayer electronic device of claim 1 , wherein the inductor has a length-to-average-width ratio that is less than about 10.
8. The multilayer electronic device of claim 1 , wherein the inductor has an average width that is less than about 1 mm.
9. The multilayer electronic device of claim 1 , wherein the inductor has an effective length that is less than about 2 mm.
10. The multilayer electronic device of claim 1 , wherein the inductor comprises an additional width discontinuity edge, and wherein the additional width discontinuity edge and the width discontinuity edge are symmetric about at least one of a longitudinal centerline or a lateral centerline of the inductor.
11. The multilayer electronic device of claim 1 , wherein the multilayer electronic device is configured as a filter.
12. The multilayer electronic device of claim 11 , wherein the filter has a characteristic frequency that is greater than about 6 GHz.
13. The multilayer electronic device of claim 12 , wherein the characteristic frequency comprises at least one of a low pass frequency, a high pass frequency, or an upper bound of a bandpass frequency.
14. The multilayer electronic device of claim 1 , wherein the conductive layer is a first conductive layer and further comprising:
a second conductive layer overlying a respective one dielectric layer of the plurality of dielectric layers,
wherein the second conductive layer and the first conductive layer are spaced apart in the Z-direction by less than 100 microns.
15. The multilayer electronic device of claim 1 . wherein the conductive layer is a first conductive layer and further comprising:
a second conductive layer overlying a respective one dielectric layer of the plurality of dielectric layers:
a ground plane; and
a via electrically connecting at least one of the first conductive layer or the second conductive layer to the ground plane.
16. The multilayer electronic device of claim 1 , further comprising a dielectric material having a dielectric constant that is less than about 100 as determined in accordance with IPC TM-650 2.5.5.3 at an operating temperature of 25° C. and frequency of 1 MHz.
17. The multilayer electronic device of claim 1 , further comprising a dielectric material having a dielectric constant that is greater than about 100 as determined in accordance with IPC TM-650 2.5.5.3 at an operating temperature of 25° C. and frequency of 1 MHz.
18. The multilayer electronic device of claim 1 , further comprising an organic dielectric material.
19. The multilayer electronic device of claim 18 , wherein the organic dielectric material comprises at least one of liquid crystalline polymer or polyphenyl ether.
20. A multilayer electronic device comprising:
a plurality of dielectric layers;
a signal path having an input and an output; and
an inductor comprising a conductive layer overlying one of the plurality of dielectric layers, and wherein the inductor is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground, and wherein:
the inductor has an outer perimeter comprising a first straight edge that faces outward in a first direction and a second straight edge that is parallel to the first straight edge and faces outward in the first direction;
the second straight edge is offset from the first straight edge in the first direction by an offset distance that is less than about 500 microns and less than about 90% of a first width of the inductor in the first direction at the first straight edge; and
the outer perimeter comprises a width discontinuity edge extending between the first straight edge and the second straight edge, the width discontinuity edge being spaced apart from a corner of a longitudinal centerline of the inductor by at least about 30 microns.
21. A multilayer electronic device comprising:
a plurality of dielectric layers;
a signal path having an input and an output; and
an inductor comprising a conductive layer overlying one of the plurality of dielectric layers, and wherein the inductor is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground, and wherein:
the inductor has an outer perimeter comprising a first straight edge that faces outward in a first direction and a second straight edge that is parallel to the first straight edge and faces outward in the first direction;
the second straight edge is offset from the first straight edge in the first direction by an offset distance that is less than about 500 microns and less than about 90% of a first width of the inductor in the first direction at the first straight edge; and
the offset distance is approximately equal to a minimum line width.
22. A method of designing an inductor for a multilayer electronic device, the method comprising:
selecting an effective length and a width for the inductor based on a target inductance value for the inductor;
sizing an offset distance associated with a protrusion of the inductor, the offset distance being between a first straight edge of a perimeter of the inductor and a second straight edge of the perimeter of the inductor, the offset distance being less than 500 microns and less than about 90% of a first width of the inductor in a first direction at the first straight edge,
wherein the first straight edge faces outward in the first direction, and the second straight edge is parallel with the first straight edge and faces outward in the first direction, and
wherein the inductor has a second width at the second straight edge in the first direction, and wherein a ratio of the second width to the first width ranges from about 1.02 to about 1.9.
23. A multilayer electronic device comprising:
a plurality of dielectric layers;
a signal path having an input and an output; and
an inductor comprising a conductive layer overlying one of the plurality of dielectric layers, and wherein the inductor is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground, and wherein:
the inductor has an outer perimeter comprising a first straight edge that faces outward in a first direction and a second straight edge that is parallel to the first straight edge and faces outward in the first direction;
the second straight edge is offset from the first straight edge in the first direction by an offset distance that is less than about 500 microns and less than about 90% of a first width of the inductor in the first direction at the first straight edge; and
the outer perimeter comprises a width discontinuity edge extending between the first straight edge and the second straight edge, the width discontinuity edge being perpendicular to the first straight edge and second straight edge.