FINFET PIXEL ARCHITECTURE FOR IMAGE SENSOR PACKAGES AND RELATED METHODS

1 . A pixel of an image sensor, comprising:

a photodiode region coupled with a transfer region coupled with one or more fin field-effect transistors (FinFETs);

wherein the one or more FinFETs are one of a transfer transistor, a storage gate, a reset transistor, a source follower transistor, a row select transistor, or an anti-blooming gate.

2 . The pixel of claim 1 , wherein the one or more FinFETs are aligned with a deep trench isolation region adjacent to the photodiode region.

3 . The pixel of claim 2 , wherein the photodiode region is defined by the deep trench isolation region and the deep trench isolation region comprises metal.

4 . The pixel of claim 1 , wherein the one or more FinFETs are arranged around one of the photodiode region or a metal reflector.

5 . The pixel of claim 1 , further comprising two or more FinFETs, at least one of the two or more FinFETs having a different size.

6 . The pixel of claim 1 , wherein the one or more FinFETs are formed around a perimeter of the pixel.

7 . The pixel of claim 1 , wherein each FinFET of the one or more FinFETs comprises silicon and a wrapped polysilicon gate.

8 . The pixel of claim 1 , further comprising a color filter array coupled over the photodiode region.

9 . The pixel of claim 8 , further comprising a microlens coupled over the color filter array.

10 . A pixel array, comprising:

at least two pixels, each of the two pixels comprising a photodiode region, the photodiode region surrounded by one or more field-effect transistors (FinFETs);

wherein the one or more FinFETs are one of a transfer transistor, a storage gate, a reset transistor, a source follower transistor, a row select transistor, or an anti-blooming gate.

11 . The pixel array of claim 10 , further comprising two or more FinFETs, wherein the two or more FinFETs are arranged around the at least two pixels.

12 . The pixel array of claim 10 , further comprising two or more FinFETs, at least one of the two or more FinFETs having a different size.

13 . The pixel array of claim 10 , wherein the one or more FinFETs are formed around a perimeter of each pixel of the at least two pixels.

14 . A method of forming a pixel, comprising:

providing a silicon substrate;

patterning a first photoresist layer on the silicon substrate;

etching to form one or more field-effect transistor (FinFET) structures on the silicon substrate;

depositing a second photoresist layer onto the one or more FinFET structures;

implanting a photodiode region;

removing the second photoresist layer from the one or more FinFET structures;

patterning a third photoresist layer over the photodiode region;

implanting the one or more FinFET structures; and

implanting the photodiode region in a chained pattern.

15 . The method of claim 14 , further comprising implanting a pinning implant over a storage gate FinFET structure of the one or more FinFET structures.

16 . The method of claim 14 , further comprising implanting an isolation region.

17 . The method of claim 14 , further comprising growing oxide on the silicon substrate.

18 . The method of claim 14 , further comprising depositing a gate on the one or more FinFET structures and etching the gate.

19 . The method of claim 14 , further comprising performing backside deep trench isolation etching.

20 . The method of claim 14 , further comprising:

forming and depositing a dielectric layer;

forming one or more vias;

forming one or more traces coupled to the one or more vias;

forming a passivation layer;

depositing an anti-reflective coating;

forming a color filter array; and

forming a plurality of microlenses over the color filter array.