IP Library Granted Patent US 11,394,490
Granted Patent B1
US 11,394,490 · App. 16/722,300 · Granted Jul 19, 2022

Q margin

Inventors: Yue Pan (Boston, MA); Jonas Geyer (Somerville, MA)
Assignee: Acacia Communications, Inc.
H04L1/0057H03M13/03H03M13/43H04L1/0041H04L1/0045H04L1/0618
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Quick Facts
Patent No.
US 11,394,490
App. No.
16/722,300
Granted
Jul 19, 2022
Kind
B1
Abstract

A method, system, and ASIC chip for comparing a bit error rate (BER) to a forward error correction (FEC) threshold to determine a Q margin for a codeblock; wherein the BER corresponds to the number of errors in a given amount of data; where a codeblock of a FEC corresponds to the given amount of data; wherein the FEC threshold corresponds to the maximum amount of errors per codeblock that the FEC is able to remove per given amount of data; wherein the Q margin corresponds to a difference between the BER and the FEC threshold.

Claims (49)

1. A method comprising:

receiving at least one of a plurality of forward error correcting (FEC) codeblocks transmitted across an optical link; wherein each of the plurality of FEC codeblocks correspond to a portion of data bits provided to the FEC in a given time interval;

measuring a bit error rate (BER) for each of the plurality of FEC codeblocks;

determining a Q margin by comparing the measured BER for each of the plurality of FEC codeblocks with a FEC threshold; wherein the FEC threshold corresponds to the maximum amount of errors per FEC codeblock that the FEC is able to correct;

storing the Q margin for each of the plurality of FEC codeblocks; and

reporting each of the plurality of FEC codeblocks and an associated measured BER when the Q margin exceeds the FEC threshold for any of the plurality of FEC codeblocks; wherein if the Q margin for any one of the plurality of FEC codeblocks exceeds the FEC threshold each of the plurality of FEC codeblocks is discarded.

2. The method of claim 1 further comprising:

determining a maximum measured BER; wherein a plurality of BERs are measured for a set of the plurality of FEC codeblocks; wherein the maximum BER is the largest of the plurality of measured BER for the set of the plurality of FEC codeblocks;

determining a max BER Q margin;

storing the max BER Q margin; and

reporting the max BER Q margin to enable determination on whether an FEC codeblock had an unacceptable amount of error.

3. The method of claim 1 wherein the amount of data is data converted from an optical signal.

4. The method of claim 3 wherein the FEC threshold further corresponds to the amount of errors that may be removed; where the errors include errors introduced during transmission of the optical signal.

5. The method of claim 4 wherein the FEC includes a decoder on a receiver portion of a second transceiver; and the decoder decodes a signal encoded by an encoder of the FEC on a transmitter portion of a first transceiver.

6. The method of claim 4 wherein the optical signal is transmitted from the transmitter portion of a first transceiver to the receiver portion of the second transceiver.

7. An ASIC chip comprising

Forward Error Correction; and

logic enabling:

receiving at least one of a plurality of FEC codeblocks transmitted across an optical link; wherein each of the plurality of FEC codeblocks correspond to a portion of data bits provided to the FEC in a given time interval;

measuring a bit error rate (BER) for each of a plurality of FED codeblocks;

determining a Q margin by comparing the measured BER for each of the plurality of FEC codeblocks with an FEC threshold; wherein the FEC threshold corresponds to the maximum amount of errors per FEC codeblock that the FEC is able to correct;

storing the Q margin for each of the plurality of FEC codeblocks; and

reporting each of the plurality of FEC codeblocks and an associated measured BER when the Q margin exceeds the FEC threshold; wherein if the Q margin for any one of the plurality of FEC codeblocks exceeds the FEC threshold each of the plurality of FEC codeblocks is discarded.

8. The ASIC chip of claim 7 , wherein the logic further enables:

determining a maximum measured BER; wherein a plurality of BERs are measured for a set of the plurality of FEC codeblocks; wherein the maximum BER is the largest of the plurality of measured BER for the set of the plurality of FEC codeblocks;

determining a max BER Q margin;

storing the max BER Q margin; and

reporting the max BER Q margin to enable determination on whether an FEC codeblock had an unacceptable amount of error.

9. The ASIC chip of claim 7 , wherein the amount of data is data converted from an optical signal.

10. The ASIC chip of claim 9 , wherein the FEC threshold further corresponds to the amount of errors that may be removed; where the errors include errors introduced during transmission of the optical signal.

11. The ASIC chip of claim 10 , wherein the FEC includes a decoder on a receiver portion of a second transceiver;

wherein the logic further enables the decoder decodes a signal encoded by an encoder of a transmitter FEC on a transmitter portion of a first transceiver.

12. The ASIC chip of claim 11 wherein the optical signal is transmitted from the transmitter portion of a first transceiver to the receiver portion of the second transceiver.

13. A system comprising:

a first transceiver with an ASIC; wherein the first transceiver ASIC has a first FEC;

and a second transceiver with an ASIC; wherein the second transceiver ASIC has a second FEC; and

logic enabling:

transmission of at least one of a plurality of FEC codeblocks across an optical link; wherein each of the plurality of FEC codeblocks correspond to a portion of data bits provided to the FEC in a given time interval;

measuring a bit error rate (BER) for each of the plurality of FEC codeblocks;

determining a Q margin by comparing the measured BER for each of the plurality of FEC codeblocks with an FEC threshold; wherein the FEC threshold corresponds to the maximum amount of errors per FEC codeblock that the FEC is able to correct;

storing the Q margin for each of the plurality of FEC codeblocks; and

reporting each of the plurality of FEC codeblocks and an associated measured BER when the Q margin exceeds the FEC threshold; wherein if the Q margin for any one of the plurality of FEC codeblocks exceeds the FEC threshold each of the plurality of FEC codeblocks is discarded.

14. The system of claim 13 , wherein the logic further enables:

determining a maximum measured BER; wherein a plurality of BERs are measured for a set of the plurality of FEC codeblocks; wherein the maximum BER is the largest of the plurality of measured BER for the set of the plurality of FEC codeblocks;

determining a max BER Q margin;

storing the max BER Q margin; and

reporting the max BER Q margin to enable determination on whether an FEC codeblock had an unacceptable amount of error.

15. The system of claim 14 , wherein the amount of data is data converted from an optical signal.

16. The system of claim 15 wherein the optical signal is transmitted from the first transceiver to the second transceiver.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2024
From: ACACIA COMMUNICATIONS, INC.
To: ACACIA TECHNOLOGY, INC.
Reel/Frame 066832/0659 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2020
From: PAN, YUE; GEYER, JONAS
To: ACACIA COMMUNICATIONS, INC.
Reel/Frame 051504/0379 →
Cited By (2)
US 12,580,679 US 12,659,074