IP Library Granted Patent US 11,830,856
Granted Patent B2
US 11,830,856 · App. 16/745,762 · Granted Nov 28, 2023

Semiconductor package and related methods

Inventors: Chee Hiong Chew (Seremban, MY); Erik Nino Tolentino (Seremban, MY); Vemmond Jeng Hung Ng (Senawang, MY); Shutesh Krishnan (Seremban, MY)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L25/072H01L23/3735H01L24/40H01L24/84H01L25/18H01L25/50H01L2224/4001H01L2224/4052H01L2224/40137H01L2224/40991H01L2224/8484H01L2224/84931H01L2924/01029H01L2924/01047H01L2924/0503H01L2924/1203H01L2924/13055
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Quick Facts
Patent No.
US 11,830,856
App. No.
16/745,762
Granted
Nov 28, 2023
Kind
B2
Abstract

Implementations of semiconductor packages may include one or more die coupled over a substrate, an electrically conductive spacer coupled over the substrate, and a clip coupled over and to the one or more die and the electrically conductive spacer. The clip may electrically couple the one or more die and the electrically conductive spacer.

Claims (39)

1. A semiconductor package comprising:

a first die coupled over a substrate;

a second die coupled over the substrate;

an electrically conductive spacer coupled over the substrate; and

a clip coupled over and directly to the first die, the second die, and the electrically conductive spacer through one of a conductive adhesive or a solder;

wherein the clip electrically couples the first die and the second die with the electrically conductive spacer;

wherein the clip comprises a first portion with a first thickness and a second portion with a second thickness less than the first thickness; and

wherein the first portion is directly coupled over the first die and the second portion is directly coupled over the second die and the electrically conductive spacer.

2. The package of claim 1 , wherein the electrically conductive spacer is a vertical connection system.

3. The package of claim 1 , wherein the clip is coupled to the first die, the second die, and the electrically conductive spacer through a silver sintering material.

4. The package of claim 1 , wherein the first die and the second die comprise an insulative gate bipolar transistor (IGBT) and a diode.

5. The package of claim 1 , wherein the electrically conductive spacer comprises a copper foil.

6. The package of claim 1 , wherein the package includes only a single clip.

7. The package of claim 1 , wherein the electrically conductive spacer is directly coupled to both the substrate and the clip through one of the solder, or the conductive adhesive and wherein the first die and the second die are directly coupled to both the substrate and the clip through a sintering material.

8. The package of claim 1 , wherein a thickness of the first die is greater than a thickness of the second die.

9. The package of claim 1 , wherein a plane formed by a surface of the first portion facing the first die is closer to the substrate than a plane formed by a surface of the second die facing the clip.

10. A semiconductor package comprising:

one or more die coupled over a substrate;

an electrically conductive spacer coupled over the substrate; and

a redistribution layer (RDL) comprising boron nitrite coupled over and directly to the one or more die and the electrically conductive spacer through one of a conductive adhesive or a solder;

wherein the RDL electrically connects the one or more die and the electrically conductive spacer; and

wherein a height of the electrically conductive spacer is the same as a height of a die of the one or more die.

11. The package of claim 10 , wherein the electrically conductive spacer is directly coupled to both the substrate and the RDL through a silver sinter material.

12. The package of claim 10 , wherein the RDL comprises a plurality of electrical traces on one side.

13. The package of claim 10 , wherein the electrically conductive spacer comprises copper foil.

14. The package of claim 10 , wherein the substrate comprises a direct bonded copper (DBC) substrate.

15. The package of claim 10 , wherein the one or more die comprise a first die and a second die, wherein the height of the electrically conductive spacer is the same as a height of the first die and is the same as a height of the second die.

16. A semiconductor package comprising:

a plurality of semiconductor modules, each module comprising:

a first die coupled over a substrate;

a second die coupled over a substrate;

an electrically conductive spacer coupled over the substrate; and

a clip coupled over and directly to the first die, the second die, and the electrically conductive spacer through one of a conductive adhesive or a solder;

wherein the clip electrically couples the first die and the second die with and the electrically conductive spacer;

wherein the clip comprises a first portion with a first thickness and a second portion with a second thickness less than the first thickness; and

wherein a thickness of the first die is greater than a thickness of the second die and the thickness of the second die is the same as a thickness of the electrically conductive spacer.

17. The package of claim 16 , wherein the first portion is directly coupled over the first die and the second portion is directly coupled over the electrically conductive spacer and the second die.

18. The package of claim 16 , wherein the plurality of modules comprises six modules.

19. The package of claim 16 , wherein the electrically conductive spacer is directly coupled to both the substrate and the clip through one of the solder, or the conductive adhesive and wherein the first die and the second die are directly coupled to both the substrate and the clip through a sintering material.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 052656, FRAME 0842 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064080/0149 →
SECURITY INTEREST Recorded May 13, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 052656/0842 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2020
From: TOLENTINO, ERIK NINO MERCADO; CHEW, CHEE HIONG; NG, VEMMOND JENG HUNG; KRISHNAN, SHUTESH
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 051545/0380 →