IP Library Granted Patent US 11,536,783
Granted Patent B2
US 11,536,783 · App. 16/750,242 · Granted Dec 27, 2022

Semiconductor device

Inventors: Takaaki Hioka (Chiba, JP); Tomoki Hikichi (Chiba, JP)
Assignee: ABLIC INC.
G01R33/077G01R33/075H01L43/04H01L43/065
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Quick Facts
Patent No.
US 11,536,783
App. No.
16/750,242
Granted
Dec 27, 2022
Kind
B2
Abstract

A semiconductor device includes a vertical Hall element provided in a first region of a semiconductor substrate, and having the first to the third electrodes arranged side by side in order along a first straight line; a circuit provided in a second region of the semiconductor substrate different from the first region, and having a heat source; and a second straight line intersecting orthogonally a current path for a Hall element drive current which flows between the first electrode and the third electrode. The second line passes a center of the vertical Hall element, and a center point of a region which reaches the highest temperature in the circuit during an operation of the vertical Hall element lies on the second straight line.

Claims (43)

1. A semiconductor device, comprising:

a first vertical Hall element provided in a first region of a semiconductor substrate, and having a first electrode, a second electrode, and a third electrode which are arranged side by side in order along a first straight line;

a first circuit provided in a second region of the semiconductor substrate different from the first region, and having a heat source; and

a second straight line intersecting orthogonally a first current path for a Hall element drive current which flows between the first electrode and the third electrode, the second straight line passing a center of the first vertical Hall element,

wherein a center point of a region which reaches the highest temperature in the first circuit during an operation of the first vertical Hall element lies on the second straight line,

wherein the semiconductor device further comprises a second circuit provided in a third region of the semiconductor substrate different from the first region and the second region, and having a heat source,

wherein a center point of a region which reaches the highest temperature in the second circuit during the operation of the first vertical Hall element lies on the second straight line.

2. The semiconductor device according to claim 1 , further comprising a second vertical Hall element provided in a third region of the semiconductor substrate different from the first region and the second region, and having a fourth electrode, a fifth electrode, and a sixth electrode which are arranged side by side in order along a third straight line,

wherein a straight line intersecting orthogonally a second current path for a Hall element drive current which flows between the fourth electrode and the sixth electrode, and passing a center of the second vertical Hall element, coincides with the second straight line.

3. The semiconductor device according to claim 1 , further comprising:

a second vertical Hall element provided in a third region of the semiconductor substrate different from the first region and the second region, and having a fourth electrode, a fifth electrode, and a sixth electrode which are arranged side by side in order along a third straight line orthogonal to the first straight line; and

a fourth straight line intersecting orthogonally a second current path as a path for a Hall element drive current which flows between the fourth electrode and the sixth electrode, and passing a center of the second vertical Hall element, and

wherein the center point of the region that reaches the highest temperature in the first circuit during the operation of the first vertical Hall element lies on the fourth straight line.

4. The semiconductor device according to claim 1 , wherein the first vertical Hall element further includes a seventh electrode and an eighth electrode provided side by side with respect to the first electrode, the second electrode, and the third electrode along the first straight line so as to sandwich the first electrode, the second electrode, and the third electrode.

5. The semiconductor device according to claim 1 , wherein the first vertical Hall element is line-symmetric with respect to the second straight line.

6. The semiconductor device according to claim 2 , wherein the second vertical Hall element further comprises a ninth electrode and a tenth electrode provided side by side with respect to the fourth electrode, the fifth electrode, and the sixth electrode along the third straight line so as to sandwich the fourth electrode, the fifth electrode, and the sixth electrode.

7. The semiconductor device according to claim 2 , wherein the second vertical Hall element is line-symmetric with respect to the second straight line.

8. The semiconductor device according to claim 3 , wherein the second vertical Hall element further comprises a ninth electrode and a tenth electrode provided side by side with respect to the fourth electrode, the fifth electrode, and the sixth electrode along the third straight line so as to sandwich the fourth electrode, the fifth electrode, and the sixth electrode.

9. The semiconductor device according to claim 3 , wherein the second vertical Hall element is line-symmetric with respect to the fourth straight line.

10. A semiconductor device, comprising:

a first vertical Hall element provided in a first region of a semiconductor substrate, and having a first electrode, a second electrode, and a third electrode which are arranged side by side in order along a first straight line;

a first circuit provided in a second region of the semiconductor substrate different from the first region, and having a heat source; and

a second straight line intersecting orthogonally a first current path for a Hall element drive current which flows between the first electrode and the third electrode, the second straight line passing a center of the first vertical Hall element,

wherein a center point of a region which reaches the highest temperature in the first circuit during an operation of the first vertical Hall element lies on the second straight line,

wherein the semiconductor device further comprises:

a second vertical Hall element provided in a third region of the semiconductor substrate different from the first region and the second region, and having a fourth electrode, a fifth electrode, and a sixth electrode which are arranged side by side in order along a third straight line orthogonal to the first straight line; and

a fourth straight line intersecting orthogonally a second current path as a path for a Hall element drive current which flows between the fourth electrode and the sixth electrode, and passing a center of the second vertical Hall element, and

wherein the center point of the region that reaches the highest temperature in the first circuit during the operation of the first vertical Hall element lies on the fourth straight line.

11. The semiconductor device according to claim 10 , wherein the first vertical Hall element further includes a seventh electrode and an eighth electrode provided side by side with respect to the first electrode, the second electrode, and the third electrode along the first straight line so as to sandwich the first electrode, the second electrode, and the third electrode.

12. The semiconductor device according to claim 10 , wherein the first vertical Hall element is line-symmetric with respect to the second straight line.

13. The semiconductor device according to claim 10 , wherein the second vertical Hall element further comprises a ninth electrode and a tenth electrode provided side by side with respect to the fourth electrode, the fifth electrode, and the sixth electrode along the third straight line so as to sandwich the fourth electrode, the fifth electrode, and the sixth electrode.

14. The semiconductor device according to claim 10 , wherein the second vertical Hall element is line-symmetric with respect to the fourth straight line.

15. A semiconductor device, comprising:

a first vertical Hall element provided in a first region of a semiconductor substrate, and having a first electrode, a second electrode, and a third electrode which are arranged side by side in order along a first straight line;

a first circuit provided in a second region of the semiconductor substrate different from the first region, and having a heat source; and

a second straight line intersecting orthogonally a first current path for a Hall element drive current which flows between the first electrode and the third electrode, the second straight line passing a center of the first vertical Hall element,

wherein a center point of a region which reaches the highest temperature in the first circuit during an operation of the first vertical Hall element lies on the second straight line,

wherein the device further comprises a second vertical Hall element provided in a third region of the semiconductor substrate different from the first region and the second region, and having a fourth electrode, a fifth electrode, and a sixth electrode which are arranged side by side in order along a third straight line,

wherein a straight line intersecting orthogonally a second current path for a Hall element drive current which flows between the fourth electrode and the sixth electrode, and passing a center of the second vertical Hall element, coincides with the second straight line, and

wherein the second vertical Hall element further comprises a ninth electrode and a tenth electrode provided side by side with respect to the fourth electrode, the fifth electrode, and the sixth electrode along the third straight line so as to sandwich the fourth electrode, the fifth electrode, and the sixth electrode.

16. The semiconductor device according to claim 15 , wherein the first vertical Hall element further includes a seventh electrode and an eighth electrode provided side by side with respect to the first electrode, the second electrode, and the third electrode along the first straight line so as to sandwich the first electrode, the second electrode, and the third electrode.

17. The semiconductor device according to claim 15 , wherein the first vertical Hall element is line-symmetric with respect to the second straight line.

18. The semiconductor device according to claim 15 , wherein the second vertical Hall element is line-symmetric with respect to the second straight line.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2020
From: HIOKA, TAKAAKI; HIKICHI, TOMOKI
To: ABLIC INC.
Reel/Frame 051610/0811 →
Priority Claims (1)
JP JP2019-015419 · Jan 31, 2019 · national
Continuity (1)
Related Publication 20200249284A1 · Aug 6, 2020