IP Library Granted Patent US 10,849,220
Granted Patent B1
US 10,849,220 · App. 16/750,686 · Granted Nov 24, 2020

Setting the impedance of signal traces of a circuit board using a reference trace

Inventors: Manhtien V. Phan (Morgan Hill, CA); Mau-Lin Chou (Milpitas, CA); Chih-Hao Lee (NewTaipei, TW)
Assignee: Super Micro Computer, Inc.
H05K1/0253H05K1/0298H05K2201/093
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Quick Facts
Patent No.
US 10,849,220
App. No.
16/750,686
Granted
Nov 24, 2020
Kind
B1
Abstract

A circuit board has an edge connector with signal traces. The signal traces are formed on a dielectric layer of the circuit board. A reference trace is formed within the dielectric layer or on another surface of the dielectric layer. Parameters of the reference trace are adjusted to set an impedance of a single-ended signal trace or a differential impedance of two adjacent signal traces.

Claims (15)

1. A method of setting an impedance of signal traces of a circuit board, the method comprising:

forming a first signal trace on a first surface of a dielectric layer of a circuit board;

forming a reference plane on a second surface of the dielectric layer;

forming a reference trace within the dielectric layer;

forming a second signal trace on the first surface of the dielectric layer; and

setting an impedance of the first signal trace by adjusting one or more parameters of the reference trace,

wherein each of the reference plane, the reference trace, the second signal trace, and the first signal trace comprises a metal,

wherein setting the impedance of the first signal trace includes adjusting the one or more parameters of the reference trace to set a differential impedance of the first signal trace and the second signal trace.

2. The method of claim 1 , wherein setting the impedance of the first signal trace includes adjusting a width or thickness of the reference trace.

3. The method of claim 1 , wherein setting the impedance of the first signal trace includes adjusting a depth separating the reference trace from the first signal trace.

4. The method of claim 1 , further comprising:

holding parameters of the dielectric layer, the first signal trace, the second signal trace, and the reference plane constant while adjusting the one or more parameters of the reference trace to set the differential impedance of the first signal trace and the second signal trace.

5. The method of claim 1 , wherein the differential impedance of the first signal trace and the second signal trace is set to about 85 ohms.

6. The method of claim 1 , wherein the reference trace is formed to have a width that is narrower than a spanning distance between outer perimeters of the first signal trace and the second signal trace.

7. The method of claim 1 , wherein the first signal trace and the second signal trace are formed on an edge connector of the circuit board.

Assignments (2)
SECURITY INTEREST Recorded Jan 20, 2026
From: SUPER MICRO COMPUTER, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 074447/0643 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2020
From: PHAN, MANHTIEN V.; CHOU, MAU-LIN; LEE, CHIH-HAO
To: SUPER MICRO COMPUTER, INC.
Reel/Frame 051796/0049 →