RF switch with split tunable matching network
An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.
1. A radio frequency (RF) integrated circuit chip including:
(a) a selector switch fabricated on the integrated circuit chip and having an input port;
(b) an on-chip impedance matching network (IMN) tuner fabricated on the integrated circuit chip so as to be coupled to and in close proximity with the input port of the selector switch and configured to be coupled to an off-chip set of IMN components to operate as an impedance matching network, the on-chip IMN tuner including a digitally tunable capacitor; and
(c) an on-chip control circuit fabricated on the integrated circuit chip so as to be coupled to at least the on-chip IMN tuner, for providing tuning values for the digitally tunable capacitor that includes at least one stack of field effect transistors configured to withstand high power signals during operation;
wherein the on-chip IMN tuner and the off-chip set of IMN components together comprise an impedance matching network.
2. The invention of claim 1 , wherein the integrated circuit chip is fabricated using a silicon-on-insulator process.
3. A radio frequency (RF) integrated circuit chip including:
(a) a selector switch with an input port;
(b) an on-chip impedance matching network (IMN) tuner coupled to the input port of the selector switch and configured to be coupled to an off-chip set of IMN components, the on-chip IMN tuner including a digitally tunable capacitor; and
(c) an on-chip control circuit, coupled to at least the on-chip IMN tuner, for providing tuning values for at least the digitally tunable capacitor;
wherein the on-chip IMN tuner and the off-chip set of IMN components together comprise an impedance matching network, and wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resonant frequency from parasitic inductance is more than about twice the operating frequency of the integrated circuit.
4. The invention of claim 3 , wherein the digitally tunable capacitor includes at least one stack of field effect transistors configured to withstand high power signals during operation.
5. The invention of claim 3 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is less than about 1.0 nH.
6. The invention of claim 3 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is less than about 0.5 nH.
7. The invention of claim 3 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is about 0.1 nH or less.
8. A radio frequency (RF) amplifier, including an integrated circuit having:
(a) an on-chip impedance matching network (IMN) tuner including a digitally tunable capacitor;
(b) a selector switch coupled to the on-chip IMN tuner;
(c) an RF amplifier configured to be coupled to the on-chip IMN tuner through an off-chip set of IMN components; and
(d) an on-chip control circuit, coupled to at least the on-chip IMN tuner, for providing tuning values for at least the digitally tunable capacitor;
wherein the on-chip IMN tuner and the off-chip set of IMN components together comprise an impedance matching network for the RF amplifier, and wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resonant frequency from parasitic inductance is more than about twice the operating frequency of the integrated circuit.
9. The invention of claim 8 , wherein the digitally tunable capacitor includes at least one stack of field effect transistors configured to withstand high power signals during operation.
10. The invention of claim 8 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is less than about 1.0 nH.
11. The invention of claim 8 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is less than about 0.5 nH.
12. The invention of claim 8 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is about 0.1 nH or less.
13. A radio frequency (RF) impedance matching network (IMN) for providing impedance matching for an RF amplifier, including an integrated circuit having an on-chip IMN tuner having a digitally tunable capacitor, an on-chip control circuit coupled to at least the digitally tunable capacitor for providing tuning values for the digitally tunable capacitor, and a selector switch coupled to the on-chip IMN tuner, the integrated circuit being configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF amplifier, wherein the on-chip IMN tuner and the off-chip set of IMN components together comprise an impedance matching network for the RF amplifier, and wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resonant frequency from parasitic inductance is more than about twice the operating frequency of the integrated circuit.
14. The invention of claim 13 , wherein the digitally tunable capacitor includes at least one stack of field effect transistors configured to withstand high power signals during operation.
15. The invention of claim 13 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is less than about 1.0 nH.
16. The invention of claim 13 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is less than about 0.5 nH.
17. The invention of claim 13 , wherein the on-chip IMN tuner and the selector switch are integrated in close enough proximity such that the resulting parasitic inductance is about 0.1 nH or less.