IP Library Granted Patent US 11,189,643
Granted Patent B2
US 11,189,643 · App. 16/755,645 · Granted Nov 30, 2021

Display device and electronic device

Inventors: Susumu Kawashima (Kanagawa, JP); Naoto Kusumoto (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225G02F1/13624H01L27/124H01L27/1255
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Quick Facts
Patent No.
US 11,189,643
App. No.
16/755,645
Granted
Nov 30, 2021
Kind
B2
Abstract

A display device capable of performing proper display without image signal conversion is provided. In the case of high-resolution display, individual data is supplied to each pixel through a first signal line and a first transistor included in each pixel. In the case of low-resolution display, the same data is supplied to a plurality of pixels through a second signal line and a second transistor electrically connected to the plurality of pixels. When the number of image signals to be displayed is more than one and the image signals support different resolutions, display can be performed without up conversion or down conversion by switching an image signal supply path as described above.

Claims (61)

1. A display device comprising:

a first transistor and a first circuit to a fourth circuit,

wherein the first circuit to the fourth circuit each include a second transistor, a first capacitor, and a circuit block,

wherein one of a source and a drain of the second transistor is electrically connected to one electrode of the first capacitor,

wherein the one electrode of the first capacitor is electrically connected to the circuit block,

wherein the other electrode of the first capacitor is electrically connected to one of a source and a drain of the first transistor,

wherein the circuit block includes a sixth transistor, a third capacitor, and a liquid crystal element,

wherein one electrode of the liquid crystal element is electrically connected to one electrode of the third capacitor,

wherein the one electrode of the third capacitor is electrically connected to one of a source and a drain of the sixth transistor, and

wherein the other of the source and the drain of the sixth transistor is electrically connected to the one electrode of the first capacitor.

2. The display device according to claim 1 ,

wherein the second transistor includes a metal oxide in a channel formation region, and the metal oxide includes In, Zn, and M, M being Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf.

3. The display device according to claim 1 ,

wherein a gate of the second transistor included in the first circuit is electrically connected to a gate of the second transistor included in the second circuit, and

wherein a gate of the second transistor included in the third circuit is electrically connected to a gate of the second transistor included in the fourth circuit.

4. The display device according to claim 1 ,

wherein the other of the source and the drain of the second transistor included in the first circuit is electrically connected to the other of the source and the drain of the second transistor included in the third circuit, and

wherein the other of the source and the drain of the second transistor included in the second circuit is electrically connected to the other of the source and the drain of the second transistor included in the fourth circuit.

5. The display device according to claim 1 ,

wherein the first circuit to the fourth circuit each have a function of pixels arranged in a matrix,

wherein the first circuit is provided in an n-th row and an i-th column, each of n and i being a natural number),

wherein the second circuit is provided in the n-th row and an (i+x)th column, x being a natural number),

wherein the third circuit is provided in an (n+1)th row and the i-th column, and

wherein the fourth circuit is provided in the (n+1)th row and the (i+x)th column.

6. The display device according to claim 1 ,

wherein the sixth transistor includes a metal oxide in a channel formation region, and the metal oxide includes In, Zn, and M, M being Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf.

7. A display device comprising:

a first transistor, a first circuit, a second circuit, a third circuit, a first wiring, a second wiring, and a third wiring,

wherein the first circuit to the third circuit each include a second transistor, a first capacitor, and a display element,

wherein one of a source and a drain of the second transistor is electrically connected to one electrode of the first capacitor,

wherein the one electrode of the first capacitor is electrically connected to the display element,

wherein the first circuit to the third circuit are provided to be sequentially next to each other in one direction,

wherein the first wiring is provided between the first circuit and the second circuit,

wherein the second wiring and the third wiring are provided between the second circuit and the third circuit,

wherein the first wiring is electrically connected to the other of the source and the drain of the second transistor included in the second circuit,

wherein the second wiring is electrically connected to the other of the source and the drain of the second transistor included in the third circuit,

wherein the third wiring is electrically connected to one of a source and a drain of the first transistor, and

wherein the other of the source and the drain of the first transistor is electrically connected to the other electrode of the first capacitor included in any of the first circuit to the third circuit.

8. A display device comprising:

a first transistor, a first circuit, a second circuit, a third circuit, a first wiring, a second wiring, a third wiring, and a fourth wiring,

wherein the first circuit to the third circuit each include a second transistor, a first capacitor, a second capacitor, and a display element,

wherein one of a source and a drain of the second transistor is electrically connected to one electrode of the first capacitor,

wherein the one electrode of the first capacitor is electrically connected to one electrode of the second capacitor,

wherein the one electrode of the second capacitor is electrically connected to the display element,

wherein the first circuit to the third circuit are provided to be sequentially next to each other in one direction,

wherein the first wiring and the second wiring are provided between the first circuit and the second circuit,

wherein the third wiring and the fourth wiring are provided between the second circuit and the third circuit,

wherein the first wiring is electrically connected to the other of the source and the drain of the second transistor included in the second circuit,

wherein the second wiring is electrically connected to the other electrode of the second capacitor included in the first circuit,

wherein the second wiring is electrically connected to the other electrode of the second capacitor included in the second circuit,

wherein the third wiring is electrically connected to the other of the source and the drain of the second transistor included in the third circuit,

wherein the fourth wiring is electrically connected to one of a source and a drain of the first transistor, and

wherein the other of the source and the drain of the first transistor is electrically connected to the other electrode of the first capacitor included in any of the first circuit to the third circuit.

9. The display device according to claim 7 , wherein the first circuit to the third circuit each have a function of emitting light with a different color to an outside.

10. An electronic device comprising:

the display device according to claim 1 , and a camera.

11. The display device according to claim 8 , wherein the first circuit to the third circuit each have a function of emitting light with a different color to an outside.

12. An electronic device comprising:

the display device according to claim 7 , and a camera.

13. An electronic device comprising:

the display device according to claim 8 , and a camera.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2020
From: KAWASHIMA, SUSUMU; KUSUMOTO, NAOTO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 052377/0352 →
Priority Claims (1)
JP JP2017-212645 · Nov 2, 2017 · national
Continuity (1)
Related Publication 20200279874A1 · Sep 3, 2020
Cited By (2)
US 12,446,309 US 12,575,179