IP Library Granted Patent US 11,575,511
Granted Patent B2
US 11,575,511 · App. 16/762,466 · Granted Feb 7, 2023

System for simplifying executable instructions for optimised verifiable computation

Inventors: Alexandra Covaci (Canterbury, GB); Simone Madeo (London, GB); Patrick Motylinski (London, GB); Stephane Vincent (Luxembourg, LU)
Assignee: nChain Licensing AG
H04L9/3066G06F8/447G06F8/451G06F9/44521G06F16/27G06Q20/065G06Q20/401G06Q20/405H04L9/0618H04L9/0637H04L9/0643H04L9/30H04L9/3218H04L9/3236H04L9/3239H04L9/3247H04L9/3263H04L63/12G06F8/44H04L9/50H04L2209/34H04L2209/56
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Quick Facts
Patent No.
US 11,575,511
App. No.
16/762,466
Filed
May 7, 2020
Granted
Feb 7, 2023
Kind
B2
Art Unit
2498
USPC
380/42
Abstract

The invention relates to distributed ledger technologies such as consensus-based blockchains. Computer-implemented N methods for reducing arithmetic circuits derived from smart contracts are described. The invention is implemented using a blockchain network, which may be, for example, a Bitcoin blockchain. A set of conditions encoded in a first programming language is obtained. The set of conditions is converted into a programmatic set of conditions encoded in a second programming language. The programmatic set of conditions is precompiled into precompiled program code. The precompiled program code is transformed into an arithmetic circuit. The arithmetic circuit is reduced to form a reduced arithmetic circuit, and the reduced arithmetic circuit is stored.

Claims (94)

1. A computer-implemented method comprising:

obtaining a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

converting the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompiling the programmatic set of conditions into precompiled program code;

transforming the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reducing the arithmetic circuit to form a reduced arithmetic circuit; and

storing the reduced arithmetic circuit.

2. The computer-implemented method according to claim 1 , wherein reducing the arithmetic circuit involves minimising the arithmetic circuit to produce the reduced arithmetic circuit.

3. The computer-implemented method according to claim 1 , wherein the arithmetic circuit is a directed acyclical graph comprising:

a set of nodes representing logic gates and inputs; and

a set of edges connecting nodes in the set of nodes, individual edges in the set representing respective wires between the logic gates and the inputs.

4. The computer-implemented method according to claim 3 , wherein:

the arithmetic circuit includes a logic submodule that includes a proper subset of the set of nodes; and

reducing the arithmetic circuit includes reducing the logic submodule separately from the rest of the arithmetic circuit.

5. The computer-implemented method according to claim 4 , wherein the wires between logic gates in the logic submodule are 1-bit in width.

6. The computer-implemented method according to claim 4 , wherein:

the arithmetic circuit further includes another logic submodule that includes another subset of the set of nodes, the proper subset of nodes and the other subset of nodes being nonintersecting; and

reducing the arithmetic circuit further includes reducing the logic submodule using a first processor core in parallel with reducing the other logic submodule using a second processor core.

7. The computer-implemented method according to claim 6 , further comprising allocating the logic submodule to the first processor core and allocating the other logic submodule to the second processor core in accordance with a heuristic for optimising computational resource usage.

8. The computer-implemented method according to claim 7 , wherein the heuristic is a longest processing time greedy algorithm.

9. The computer-implemented method according to claim 1 , wherein reducing the arithmetic circuit includes:

determining a set of prime implicants of the arithmetic circuit;

expressing the set of prime implicants as a product of sums that includes a first product term and a second product term; and

simplifying the first product term and the second product term.

10. The computer-implemented method according to claim 9 , wherein simplifying the first product term and the second product term is performed by applying a Boolean minimisation rule to the first product term and the second product term.

11. The computer-implemented method according to claim 1 , wherein the second programming language is C++.

12. The computer-implemented method according to claim 1 , wherein the first programming language is a computer programming language devised for composing machine-readable financial contracts.

13. The computer-implemented method according to claim 1 , further comprising:

generating a quadratic program that includes a set of polynomials that describes the reduced arithmetic circuit; and

generating a set of parameters to be used by a node in a blockchain network in performance of the quadratic program.

14. A system, comprising:

a processor; and

memory including executable instructions that, as a result of being executed by the processor, causes the system to:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reduce the arithmetic circuit to form a reduced arithmetic circuit; and

store the reduced arithmetic circuit.

15. A non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to at least:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reduce the arithmetic circuit to form a reduced arithmetic circuit; and

store the reduced arithmetic circuit.

16. A system, comprising:

a processor; and

memory including executable instructions that, as a result of being executed by the processor, causes the system to:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reduce the arithmetic circuit to form a reduced arithmetic circuit; and

store the reduced arithmetic circuit, wherein reducing the arithmetic circuit involves minimising the arithmetic circuit to produce the reduced arithmetic circuit.

17. A system, comprising:

a processor; and

memory including executable instructions that, as a result of being executed by the processor, causes the system to:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reduce the arithmetic circuit to form a reduced arithmetic circuit; and

store the reduced arithmetic circuit, wherein the arithmetic circuit is a directed acyclical graph comprising:

a set of nodes representing logic gates and inputs; and

a set of edges connecting nodes in the set of nodes, individual edges in the set representing respective wires between the logic gates and the inputs.

18. A system, comprising:

a processor; and

memory including executable instructions that, as a result of being executed by the processor, causes the system to:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions, wherein the arithmetic circuit is a directed acyclical graph comprising:

a set of nodes representing logic gates and inputs; and

a set of edges connecting nodes in the set of nodes, individual edges in the set representing respective wires between the logic gates and the inputs

reduce the arithmetic circuit to form a reduced arithmetic circuit;

store the reduced arithmetic circuit, the arithmetic circuit includes a logic submodule that includes a proper subset of the set of nodes; and

reduce the arithmetic circuit includes reducing the logic submodule separately from the rest of the arithmetic circuit.

19. A non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reduce the arithmetic circuit to form a reduced arithmetic circuit; and

store the reduced arithmetic circuit, wherein reducing the arithmetic circuit involves minimising the arithmetic circuit to produce the reduced arithmetic circuit.

20. A non-transitory computer-readable storage medium having stored thereon executable instructions that, as a result of being executed by a processor of a computer system, cause the computer system to:

obtain a set of conditions encoded in a first programming language, wherein the set of conditions represents a smart contract;

convert the set of conditions into a programmatic set of conditions encoded in a second programming language;

precompile the programmatic set of conditions into precompiled program code;

transform the precompiled program code into an arithmetic circuit which represents the smart contract, wherein the arithmetic circuit comprises inputs associated with input values to the smart contract represented by the first set of conditions;

reduce the arithmetic circuit to form a reduced arithmetic circuit; and

store the reduced arithmetic circuit, wherein the arithmetic circuit is a directed acyclical graph comprising:

a set of nodes representing logic gates and inputs; and

a set of edges connecting nodes in the set of nodes, individual edges in the set representing respective wires between the logic gates and the inputs.

Assignments (7)
CHANGE OF NAME Recorded Dec 12, 2022
From: NCHAIN HOLDINGS LTD
To: NCHAIN LICENSING AG
Reel/Frame 062114/0397 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: COVACI, ALEXANDRA; MADEO, SIMONE; MOTYLINSKI, PATRICK; VINCENT, STEPHANE
To: NCHAIN HOLDINGS LTD
Reel/Frame 053032/0100 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: COVACI, ALEXANDRA; MADEO, SIMONE; MOTYLINSKI, PATRICK; VINCENT, STEPHANE
To: NCHAIN HOLDINGS LTD
Reel/Frame 053032/0115 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: COVACI, ALEXANDRA; MADEO, SIMONE; MOTYLINSKI, PATRICK; VINCENT, STEPHANE
To: NCHAIN HOLDINGS LTD
Reel/Frame 053032/0037 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: COVACI, ALEXANDRA; MADEO, SIMONE; MOTYLINSKI, PATRICK; VINCENT, STEPHANE
To: NCHAIN HOLDINGS LTD
Reel/Frame 053728/0809 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: COVACI, ALEXANDRA; MADEO, SIMONE; MOTYLINSKI, PATRICK; VINCENT, STEPHANE
To: NCHAIN HOLDINGS LTD
Reel/Frame 053743/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2020
From: COVACI, ALEXANDRA; MADEO, SIMONE; MOTYLINSKI, PATRICK; VINCENT, STEPHANE
To: NCHAIN HOLDINGS LTD
Reel/Frame 053032/0161 →
Priority Claims (6)
GB 1718505 · Nov 9, 2017 · national
GB 1719998 · Nov 30, 2017 · national
GB 1720768 · Dec 13, 2017 · national
GB 1801753 · Feb 2, 2018 · national
GB 1805948 · Apr 10, 2018 · national
GB 1806444 · Apr 20, 2018 · national
Continuity (1)
Related Publication 20200366492A1 · Nov 19, 2020
Cited By (1)
US 12,627,487