IP Library Granted Patent US 11,489,052
Granted Patent B2
US 11,489,052 · App. 16/767,923 · Granted Nov 1, 2022

Thin film transistor, manufacturing method of thin film transistor and display device

Inventors: Wenhui Liu (Beijing, CN); Linchang Zhong (Beijing, CN)
Assignees: Mianyang Boe Optoelectronics Technology Co., Ltd.; Beijing BOE Technology Development Co., Ltd.
H01L29/41733H01L29/401H01L29/513H01L29/78666H01L29/78675
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Quick Facts
Patent No.
US 11,489,052
App. No.
16/767,923
Granted
Nov 1, 2022
Kind
B2
Abstract

The present disclosure provides a thin film transistor, a manufacturing method of the thin film transistor and a display device, configured to improve electrical property of the thin film transistor. The thin film transistor includes: an active layer, including a source and drain contact region and a channel region; a metal barrier layer, covering the source and drain contact region; a first gate insulating layer, at least covering the channel region and exposing the metal barrier layer; a gate, on the first gate insulating layer and covering the channel region; an inner layer dielectric layer, on the gate and having a through hole exposing the metal barrier layer; and a source and drain, on the inner layer dielectric layer and in contact with the metal barrier layer through the through hole.

Claims (29)

1. A thin film transistor, comprising:

an active layer, including a source and drain contact region and a channel region;

a metal barrier layer, covering the source and drain contact region;

a first gate insulating layer, at least covering the channel region and exposing the metal barrier layer;

a gate, on the first gate insulating layer and covering the channel region;

an inner layer dielectric layer, on the gate and having a through hole exposing the metal barrier layer; and

a source and drain, on the inner layer dielectric layer and in contact with the metal barrier layer through the through hole;

wherein the first gate insulating layer only covers the channel region.

2. The thin film transistor of claim 1 , wherein the region at which the through hole is in contact with the metal barrier layer is smaller than a pattern of the metal barrier layer.

3. The thin film transistor of claim 1 , wherein the thickness of the metal barrier layer is 100 Å-1000 Å.

4. The thin film transistor of any of claim 1 , wherein the inner layer dielectric layer comprises: a second gate insulating layer and a passivation layer arranged in sequence in a laminated manner.

5. A manufacturing method of the thin film transistor, comprising:

forming in sequence an active layer, a first gate insulating layer and a gate;

patterning the first gate insulating layer to expose a source and drain contact region by utilizing the shielding of the gate, and implanting ions into the active layer to form the source and drain contact region;

forming a metal barrier layer on the source and drain contact region;

forming an inner layer dielectric layer which has a through hole exposing the metal barrier layer; and

forming, on the inner layer dielectric layer, a source and drain in contact with the metal barrier layer through the through hole;

wherein the forming a metal barrier layer on the source and drain contact region comprises:

depositing a metal film in the source and drain contact region of the active layer;

forming photoresist on the metal film, exposing and developing the photoresist to form photoresist with a first pattern, wherein the photoresist with the first pattern includes a photoresist reserved region and a photoresist unreserved region; and

etching the metal film with the photoresist with the first pattern as a mask, to remove the metal film of the photoresist unreserved region, and to form the metal barrier layer.

6. The method of claim 5 , wherein the forming an inner layer dielectric layer which has a through hole exposing the metal barrier layer comprises:

depositing a second gate insulating film and a passivation film in sequence on the gate; and

primary patterning the second gate insulating film and the passivation film, to form an inner layer dielectric layer which has a through hole exposing the metal barrier layer.

7. A display device, comprising the thin film transistor of claim 1 .

8. The thin film transistor of claim 1 , wherein the source and drain is a double-layer film.

9. The thin film transistor of claim 1 , wherein the material of the metal barrier layer is molybdenum, titanium, aluminum, molybdenum-titanium alloy, titanium-aluminum alloy or molybdenum-titanium-aluminum alloy.

10. The thin film transistor of claim 1 , wherein the metal barrier layer is a single-layer film.

11. The thin film transistor of claim 1 , wherein the source and drain is an aluminum-titanium film, aluminum-molybdenum film or titanium-molybdenum film.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2022
From: BOE TECHNOLOGY GROUP CO., LTD.
To: BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Reel/Frame 060650/0805 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FIRST ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 052778 FRAME: 0888. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 14, 2020
From: LIU, WENHUI; ZHONG, LINCHANG
To: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY CO.,LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 053770/0406 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2020
From: LIU, WENHUI; ZHONG, LINCHANG
To: MIANYANG BOE OPTOELECTRONICS TECHNOLOGY; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 052778/0888 →
Priority Claims (1)
CN 201910002600.4 · Jan 2, 2019 · national
Continuity (1)
Related Publication 20210234011A1 · Jul 29, 2021