Liquid crystal display device
View Patent ↗A liquid crystal display device, comprising: a first substrate; a second substrate disposed opposite to the first substrate; a liquid crystal layer; and a spacer, wherein the first substrate includes a first pixel row, a second pixel row, a first source line and a second source line that extend in the second direction, a first gate line that extends in the first direction between the first pixel row and the second pixel row, a first thin film transistor to which the first source line, and the first gate line are electrically connected, and a second thin film transistor to which the second source line, and the first gate line are electrically connected, and the spacer is disposed so as to overlap with at least a portion of the first thin film transistor and at least a portion of the second thin film transistor in plan view.
1. A liquid crystal display device, comprising:
a first substrate;
a second substrate disposed so as to face the first substrate;
a liquid crystal layer disposed between the first substrate and the second substrate; and
a spacer maintaining a gap between the first substrate and the second substrate; wherein the first substrate includes
a first pixel row including a first pixel electrode and a second pixel electrode that are arranged in a first direction,
a second pixel row including a third pixel electrode and a fourth pixel electrode that are arranged in the first direction, the second pixel row being adjacent to the first pixel row in a second direction that crosses the first direction,
a first source line and a second source line that extend in the second direction between the first pixel electrode and the second pixel electrode, and between the third pixel electrode and the fourth pixel electrode,
a first gate line that extends in the first direction between the first pixel row and the second pixel row,
a first thin film transistor to which the first source line, the first gate line, and the first pixel electrode are electrically connected, and
a second thin film transistor to which the second source line, the first gate line, and the second pixel electrode are electrically connected,
the spacer is disposed so as to overlap with at least a portion of the first thin film transistor and at least a portion of the second thin film transistor in plan view,
the first gate line has a first width in the second direction in a region between the first pixel electrode and the third pixel electrode, that does not overlap with the first thin film transistor in plan view, and a second width in the second direction in a region between the first thin film transistor and the second thin film transistor, that overlaps with the spacer in plan view, and
the second width of the first gate line in the entire region between the first thin film transistor and the second thin film transistor is larger than the first width.
2. The liquid crystal display device according to claim 1 , further comprising:
a third pixel row including a fifth pixel electrode and a sixth pixel electrode that are arranged in the first direction, the third pixel row being adjacent to the second pixel row in the second direction; and
a second gate line that extends in the first direction between the second pixel row and the third pixel row; wherein
the first source line and the second source line extend in the second direction between the fifth pixel electrode and the sixth pixel electrode.
3. The liquid crystal display device according to claim 2 , further comprising:
a first end connection wiring that connects the first gate line to the second gate line at an end portion of the second pixel row; wherein
a common gate signal is supplied to the first gate line and the second gate line via the first end connection wiring.
4. The liquid crystal display device according to claim 2 , further comprising:
a third source line disposed so as to sandwich, together with the first source line, the first pixel electrode and the third pixel electrode;
a fourth source line disposed so as to sandwich, together with the second source line, the second pixel electrode and the fourth pixel electrode;
a third thin film transistor to which the third source line, the second gate line, and the third pixel electrode are electrically connected; and
a fourth thin film transistor to which the fourth source line, the second gate line, and the fourth pixel electrode are electrically connected.
5. The liquid crystal display device according to claim 1 , wherein:
the counter substrate includes a black matrix, and
the black matrix is disposed so as to overlap with at least a portion of the first thin film transistor, at least a portion of the second thin film transistor, and the spacer in plan view.
6. The liquid crystal display device according to claim 1 , wherein:
the first source line is disposed at a position closer to the first pixel electrode than the second source line, and
the second source line is disposed at a position closer to the second pixel electrode than the first source line.
7. A liquid crystal display device, comprising:
a first substrate;
a second substrate disposed so as to face the first substrate;
a liquid crystal layer disposed between the first substrate and the second substrate; and
a spacer maintaining a gap between the first substrate and the second substrate; wherein
the first substrate includes
a first pixel row including a first pixel electrode and a second pixel electrode that are arranged in a first direction,
a second pixel row including a third pixel electrode and a fourth pixel electrode that are arranged in the first direction, the second pixel row being adjacent to the first pixel row in a second direction that crosses the first direction,
a first source line and a second source line that extend in the second direction between the first pixel electrode and the second pixel electrode, and between the third pixel electrode and the fourth pixel electrode,
a first gate line that extends in the first direction between the first pixel row and the second pixel row, having a first width in the second direction in a region between the first pixel electrode and the third pixel electrode, that does not overlap with the first thin film transistor in plan view,
a first thin film transistor to which the first source line, the first gate line, and the first pixel electrode are electrically connected, and
a second thin film transistor to which the second source line, the first gate line, and the second pixel electrode are electrically connected,
the spacer is disposed so as to overlap with at least a portion of the first thin film transistor and at least a portion of the second thin film transistor in plan view, and
the first gate line has a continuous width in the second direction larger than the first width from a region that overlaps with the first thin film transistor to a region that overlaps with the second thin film transistor in plan view.