Silicon photonics integration circuit
A silicon photonics integration circuit includes a silicon substrate member; a RX sub-circuit formed in the silicon substrate member including multiple RX-input ports each having a mode size converter configured to receive an incoming light signal into one of multiple waveguides and multiple RX photo detectors coupled respectively to the multiple waveguides; and a TX sub-circuit formed in the silicon substrate member including one or more TX-input ports each having a mode size converter coupled to a first TX photo detector into one input waveguide, one or more 1×2 directional couplers each coupled between the input waveguide and two mod-input waveguides, multiple modulators coupled between respective multiple mod-input waveguides and multiple mod-output waveguides each being coupled to a second TX photo detector into one of multiple output waveguides, and multiple TX-output ports each having a mode size converter coupled to respective one of the multiple output waveguides.
1. A silicon photonics integration circuit for connecting silicon photonics circuits to an optical fiber, the silicon photonics integration circuit comprising:
a substrate;
a mode size converter disposed in the substrate, the mode size converter coupled to the optical fiber and configured to match a mode size of the optical fiber to the silicon photonics integration circuit, the mode size converter comprising:
a photonic insulator;
a first waveguide made of a first semiconductor material embedded in the photonic insulator; and
a second waveguide made of a second semiconductor material, different from the first semiconductor material, spaced apart from and arranged above the first waveguide and embedded in the photonic insulator, the first and second waveguides being respectively configured to partially overlap each other;
wherein the photonic insulator further comprises first and second trenches disposed laterally on opposite sides of the second waveguide; and
wherein the first and second trenches are hollow and are filled with air.
2. The silicon photonics integration circuit of claim 1 wherein the photonic insulator is a cladding layer.
3. The silicon photonics integration circuit of claim 1 wherein the first semiconductor material includes silicon and wherein the second semiconductor material includes silicon nitride.
4. The silicon photonics integration circuit of claim 1 wherein the first and second waveguides have different shapes.
5. The silicon photonics integration circuit of claim 1 wherein the second waveguide is longer than the first waveguide.
6. The silicon photonics integration circuit of claim 1 wherein the partially overlapping portions of the first and second waveguides taper in opposite directions.
7. The silicon photonics integration circuit of claim 1 wherein:
only one portion of the first waveguide that partially overlaps a portion of the second waveguide tapers; and
the partially overlapping and non-overlapping portions of the second waveguide respectively taper in opposite directions.
8. The silicon photonics integration circuit of claim 1 wherein:
a first portion of the first waveguide tapers in a first direction;
a first portion of the second waveguide that partially overlaps with the first portion of the first waveguide tapers in a second direction that is opposite to the first direction; and
a second portion of the second waveguide that does not overlap with the first portion of the first waveguide tapers in the first direction.
9. The silicon photonics integration circuit of claim 1 wherein the first and second trenches extend along a portion of the second waveguide that does not overlap with the first waveguide.
10. The silicon photonics integration circuit of claim 1 wherein the first and second trenches are parallel to each other.
11. The silicon photonics integration circuit of claim 1 wherein the first and second trenches have the same shape.
12. The silicon photonics integration circuit of claim 1 wherein the second waveguide further comprises first and second layers of the second semiconductor material disposed in the photonic insulator respectively between the first and second trenches and the opposite sides of the second waveguide.
13. The silicon photonics integration circuit of claim 12 wherein the first and second layers extend along a portion of the second waveguide that does not overlap with the first waveguide.
14. The silicon photonics integration circuit of claim 12 wherein the first and second layers and a portion of the second waveguide that does not overlap with the first waveguide taper in the same direction away from the first waveguide.
15. A silicon photonics integration circuit for connecting silicon photonics circuits to an optical fiber, the silicon photonics integration circuit comprising:
a substrate;
a mode size converter disposed in the substrate, the mode size converter coupled to the optical fiber and configured to match a mode size of the optical fiber to the silicon photonics integration circuit, the mode size converter comprising:
a photonic insulator;
a first waveguide made of a first semiconductor material embedded in the photonic insulator; and
a second waveguide made of a second semiconductor material, different from the first semiconductor material, spaced apart from and arranged above the first waveguide and embedded in the photonic insulator, the first and second waveguides being respectively configured to partially overlap each other;
wherein the photonic insulator further comprises first and second trenches disposed laterally on opposite sides of the second waveguide;
wherein the second waveguide further comprises first and second layers of the second semiconductor material disposed in the photonic insulator respectively between the first and second trenches and the opposite sides of the second waveguide;
wherein a first portion of the first waveguide tapers in a first direction;
wherein a first portion of the second waveguide that partially overlaps with the first portion of the first waveguide tapers in a second direction that is opposite to the first direction;
wherein a second portion of the second waveguide that does not overlap with the first portion of the first waveguide tapers in the first direction; and
wherein the first and second layers taper in the first direction.
16. A silicon photonics integration circuit for connecting silicon photonics circuits to an optical fiber, the silicon photonics integration circuit comprising:
a substrate;
a mode size converter disposed in the substrate, the mode size converter coupled to the optical fiber and configured to match a mode size of the optical fiber to the silicon photonics integration circuit, the mode size converter comprising:
a photonic insulator;
a first waveguide made of a first semiconductor material embedded in the photonic insulator; and
a second waveguide made of a second semiconductor material, different from the first semiconductor material, spaced apart from and arranged above the first waveguide and embedded in the photonic insulator, the first and second waveguides being respectively configured to partially overlap each other; and
an optical modulator comprising:
third and fourth waveguides disposed parallel to each other in the substrate;
first input and output ends comprising the second semiconductor material coupled to the third waveguide; and
second input and output ends comprising the second semiconductor material coupled to the fourth waveguide; and
separate sets of the first and second waveguides coupled to the first and second input and output ends.
17. The silicon photonics integration circuit of claim 16 wherein in each of the separate sets:
a portion of the first waveguide that does not overlap with the second waveguide is coupled to a respective end of a respective one of the third and fourth waveguides; and
the portion of the respective end is embedded in the photonic insulator.
18. The silicon photonics integration circuit of claim 16 wherein:
third and fourth waveguides respectively comprise first and second PN junctions; and
wherein at least one of the first and second PN junctions is disposed at an interface between a P type doped region and a N type doped region, the interface having an irregular shape that is not perpendicular to a plane in which the second substrate lies.
19. The silicon photonics integration circuit of claim 18 wherein the interface separating the P type doped region and the N type doped region is along a line that is slanted relative to an axis perpendicular to the plane in which the second substrate lies.
20. The silicon photonics integration circuit of claim 19 wherein the line is L-shaped.
21. The silicon photonics integration circuit of claim 16 further comprising:
a first splitter coupled to the first and second inputs of the third and fourth waveguides, the first splitter configured to receive an optical signal and to guide the optical signal into the first and second inputs of the third and fourth waveguides; and
a second splitter coupled to the first and second outputs of the third and fourth waveguides, the second splitter configured to combine modulated light signals from the first and second outputs of the third and fourth waveguides.
22. A silicon photonics integration circuit for connecting silicon photonics circuits to an optical fiber, the silicon photonics integration circuit comprising:
a substrate;
a mode size converter disposed in the substrate, the mode size converter coupled to the optical fiber and configured to match a mode size of the optical fiber to the silicon photonics integration circuit, the mode size converter comprising:
a photonic insulator;
a first waveguide made of a first semiconductor material embedded in the photonic insulator; and
a second waveguide made of a second semiconductor material, different from the first semiconductor material, spaced apart from and arranged above the first waveguide and embedded in the photonic insulator, the first and second waveguides being respectively configured to partially overlap each other; and
a photodiode comprising a silicon portion and a germanium portion;
wherein the first and second waveguides coupled to the germanium portion; and
wherein the silicon portion is rectangular, the germanium portion is trapezoidal having a first side disposed on the silicon portion and a second side opposite the first side being smaller than the first side, and the first and second waveguides are coupled to the second side of the germanium portion.
23. The silicon photonics integration circuit of claim 22 wherein the silicon portion is doped with a first type of dopant and the germanium portion is doped with a second type of dopant that is different than the first type of dopant.
24. The silicon photonics integration circuit of claim 22 wherein a first portion of the silicon portion is doped with a first type of dopant, a second portion of the silicon portion is doped with a second type of dopant that is different than the first type of dopant, and the germanium portion is not doped and overlaps the first and second portions.