IP Library Granted Patent US 11,500,747
Granted Patent B2
US 11,500,747 · App. 16/777,086 · Granted Nov 15, 2022

Computer initialization debug message display system

Inventors: Jing-Hui Lee (New Taipei, TW); Shih-Chieh Hsu (New Taipei, TW)
Assignee: Dell Products L.P.
G06F11/221G06F9/44505
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Quick Facts
Patent No.
US 11,500,747
App. No.
16/777,086
Granted
Nov 15, 2022
Kind
B2
Abstract

A computing system initialization system includes a computing device that is coupled to a management device and that includes a processing system having at least one register storing debug-message-display-determination instructions, and a memory system that is coupled to the processing system and that includes Basic Input/Output System (BIOS) instructions that, when executed by the processing system, cause the processing system to provide a BIOS engine. The BIOS engine begins initialization operations and, during those initialization operations, generates at least one first debug message. The BIOS engine then accesses the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determines that the at least one first debug message should be displayed. In response, the BIOS engine transmits the at least one first debug message to the management device such that the management device displays the at least one first debug message.

Claims (75)

1. A computing system initialization system, comprising:

a management device;

a computing device that is coupled to the management device and that includes:

a processing system including at least one register storing debug-message-display-determination instructions; and

a memory system that is coupled to the processing system and that includes Basic Input/Output System (BIOS) instructions that, when executed by the processing system, cause the processing system to provide a BIOS engine that is configured to:

begin initialization operations;

generate, during the initialization operations, at least one first debug message;

access the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine that the at least one first debug message should be displayed; and

transmit, in response to determining that the at least one first debug message should be displayed, the at least one first debug message to the management device such that the management device displays the at least one first debug message.

2. The system of claim 1 , wherein the BIOS engine is configured to:

generate, during the initialization operations, at least one second debug message; and

access the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine that the at least one second debug message should not be displayed.

3. The system of claim 1 , wherein the processing system is provided by a Central Processing Unit (CPU), and wherein the at least one register included in the processing system is provided by at least one MultiMedia eXtension (MMX) register in the CPU.

4. The system of claim 1 , wherein the BIOS engine is configured to:

provide a plurality of BIOS modules that are each configured to access the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine whether at least one debug message should be displayed.

5. The system of claim 1 , wherein the memory system includes a BIOS Read-Only-Memory (ROM), and wherein the BIOS engine is configured to:

identify, prior to the initialization operations, a computing device that is coupled to the processing system and that includes device data;

store, prior to the initialization operations, the device data from the computing device in the BIOS ROM;

determine, during the initialization operations, that at least one BIOS module provided by the BIOS engine requires the device data; and

retrieve, during the initialization operations, the device data from the BIOS ROM and provide the device data to the at least one BIOS module.

6. The system of claim 5 , wherein the BIOS engine is configured to:

perform, prior to the initialization operations, at least one computation on the device data to generate a device data result;

store, prior to the initialization operations, the device data result in the BIOS ROM;

determine, during the initialization operations, that the at least one BIOS module provided by the BIOS engine requires the device data result; and

retrieve, during the initialization operations, the device data result from the BIOS ROM and provide the device data result to the at least one BIOS module.

7. An Information Handling System (IHS), comprising:

a processing system; and

a memory system that is coupled to the processing system and that includes instructions that, when executed by the processing system, cause the processing system to provide a Basic Input/Output System (BIOS) engine that is configured to:

begin initialization operations;

generate, during the initialization operations, at least one first debug message;

access at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine that the at least one first debug message should be displayed; and;

transmit, in response to determining that the at least one first debug message should be displayed, the at least one first debug message for display on a display device.

8. The IHS of claim 7 , wherein the BIOS engine is configured to:

generate, during the initialization operations, at least one second debug message; and

access the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine that the at least one second debug message should not be displayed.

9. The IHS of claim 7 , wherein the processing system is provided by a Central Processing Unit (CPU), and wherein the at least one register included in the processing system is provided by at least one MultiMedia eXtension (MMX) register in the CPU.

10. The IHS of claim 7 , wherein the BIOS engine is configured to:

provide a plurality of BIOS modules that are each configured to access the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine whether at least one debug message should be displayed.

11. The IHS of claim 7 , wherein the memory system includes a BIOS Read-Only-Memory (ROM), and wherein the BIOS engine is configured to:

identify, prior to the initialization operations, a first computing device that is coupled to the processing system and that includes first device data;

store, prior to the initialization operations, the first device data from the first computing device in the BIOS ROM;

determine, during the initialization operations, that at least one BIOS module provided by the BIOS engine requires the first device data; and

retrieve, during the initialization operations, the first device data from the BIOS ROM and provide the first device data to the at least one BIOS module.

12. The IHS of claim 11 , wherein the BIOS engine is configured to:

perform, prior to the initialization operations, at least one computation on the device data to generate a device data result;

store, prior to the initialization operations, the device data result in the BIOS ROM;

determine, during the initialization operations, that the at least one BIOS module provided by the BIOS engine requires the device data result; and

retrieve, during the initialization operations, the device data result from the BIOS ROM and provide the device data result to the at least one BIOS module.

13. The IHS of claim 11 , wherein the BIOS engine is configured to:

determine that the first device data included in the first computing device has changed to second device data; and

replace the first device data from the first computing device with the second device data from the first computing device in the BIOS ROM.

14. A method for initializing a computing system, comprising:

beginning, by a Basic Input/Output System (BIOS) engine provided by a processing system, initialization operations;

generating, by the BIOS engine during the initialization operations, at least one first debug message;

accessing, by the BIOS engine, at least one register included in the processing system to execute debug-message-display-determination instructions stored in the at least one register and, in response, determining that the at least one first debug message should be displayed; and

transmit, by the BIOS engine in response to determining that the at least one first debug message should be displayed, the at least one first debug message for display on a display device.

15. The method of claim 14 , further comprising:

generating, by the BIOS engine during the initialization operations, at least one second debug message; and

accessing, by the BIOS engine, the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determine that the at least one second debug message should not be displayed.

16. The method of claim 14 , wherein the processing system is provided by a Central Processing Unit (CPU), and wherein the at least one register included in the processing system is provided by at least one MultiMedia eXtension (MMX) register in the CPU.

17. The method of claim 14 , further comprising:

providing, by the BIOS engine, a plurality of BIOS modules that are each configured to access the at least one register included in the processing system to execute the debug-message-display-determination instructions and, in response, determining whether at least one debug message should be displayed.

18. The method of claim 14 , further comprising:

identifying, by the BIOS engine prior to the initialization operations, a first computing device that is coupled to the processing system and that includes first device data;

storing, by the BIOS engine prior to the initialization operations, the first device data from the first computing device in BIOS Read-Only-Memory (ROM);

determining, by the BIOS engine during the initialization operations, that at least one BIOS module provided by the BIOS engine requires the first device data; and

retrieving, by the BIOS engine during the initialization operations, the first device data from the BIOS ROM and provide the first device data to the at least one BIOS module.

19. The method of claim 18 , further comprising:

performing, by the BIOS engine prior to the initialization operations, at least one computation on the first device data to generate a device data result;

storing, by the BIOS engine prior to the initialization operations, the device data result in the BIOS ROM;

determining, by the BIOS engine during the initialization operations, that the at least one BIOS module provided by the BIOS engine requires the device data result; and

retrieving, by the BIOS engine during the initialization operations, the device data result from the BIOS ROM and provide the device data result to the at least one BIOS module.

20. The method of claim 18 , further comprising:

determining, by the BIOS engine, that the first device data included in the first computing device has changed to second device data; and

replacing, by the BIOS engine, the first device data from the first computing device with the second device data from the computing device in the BIOS ROM.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053311/0169) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0742 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053546/0001) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL MARKETING L.P. (ON BEHALF OF ITSELF AND AS SUCCESSOR-IN-INTEREST TO CREDANT TECHNOLOGIES, INC.); DELL INTERNATIONAL L.L.C.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; DELL MARKETING CORPORATION (SUCCESSOR-IN-INTEREST TO FORCE10 NETWORKS, INC. AND WYSE TECHNOLOGY L.L.C.); EMC IP HOLDING COMPANY LLC
Reel/Frame 071642/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052216/0758) Recorded Jun 23, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060438/0680 →
RELEASE OF SECURITY INTEREST AF REEL 052243 FRAME 0773 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0152 →
SECURITY INTEREST Recorded Jun 5, 2020
From: DELL PRODUCTS L.P.; EMC CORPORATION; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 053311/0169 →
SECURITY AGREEMENT Recorded Apr 22, 2020
From: CREDANT TECHNOLOGIES INC.; DELL INTERNATIONAL L.L.C.; DELL MARKETING L.P.; DELL PRODUCTS L.P.; DELL USA L.P.; EMC CORPORATION; FORCE10 NETWORKS, INC.; WYSE TECHNOLOGY L.L.C.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 053546/0001 →
SECURITY AGREEMENT Recorded Mar 26, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 052243/0773 →
PATENT SECURITY AGREEMENT (NOTES) Recorded Mar 24, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052216/0758 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2020
From: LEE, JING-HUI; HSU, SHIH-CHIEH
To: DELL PRODUCTS L.P.
Reel/Frame 051673/0923 →