IP Library Granted Patent US 11,182,291
Granted Patent B2
US 11,182,291 · App. 16/780,733 · Granted Nov 23, 2021

Using multi-tiered cache to satisfy input/output requests

Inventors: Lokesh Mohan Gupta (Tucson, AZ); Edward Hsiu-Wei Lin (Tucson, AZ); Beth Ann Peterson (Tucson, AZ); Matthew G. Borlick (Tucson, AZ)
Assignee: International Business Machines Corporation
G06F12/0802G06F3/061G06F3/0655G06F3/0679G06F2212/222
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Quick Facts
Patent No.
US 11,182,291
App. No.
16/780,733
Granted
Nov 23, 2021
Kind
B2
Abstract

A computer-implemented method, according to one approach, includes: receiving an I/O request. In response to determining that the I/O request does not include a bypass indication, the I/O request is satisfied using a primary cache which is coupled to a data storage device and a secondary cache having SCM. In response to determining that the data associated with the I/O request has been updated as a result of satisfying the I/O request: the updated data is destaged from the primary cache to the data storage device, the updated data is copied to the secondary cache, and the updated data is demoted from the primary cache. Yet, in response to determining that the data associated with the I/O request has not been updated: the data associated with the I/O request is copied to the secondary cache, and the data associated with the I/O request is demoted from the primary cache.

Claims (159)

1. A computer-implemented method, comprising:

receiving an input/output (I/O) request;

determining whether the I/O request includes a bypass indication;

in response to determining that the I/O request does not include a bypass indication,

satisfying the I/O request using a primary cache, wherein the primary cache is coupled to a secondary cache and a data storage device, wherein the secondary cache includes storage class memory;

determining whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the primary cache;

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the primary cache:

destaging the updated data from the primary cache to the data storage device,

copying the updated data to the secondary cache, and

demoting the updated data from the primary cache; and

in response to determining that the data associated with the I/O request has not been updated as the result of satisfying the I/O request using the primary cache:

copying the data associated with the I/O request to the secondary cache, and

demoting the data associated with the I/O request from the primary cache.

2. The computer-implemented method of claim 1 , wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory, wherein performance characteristics of the first tier of storage class memory are greater than performance characteristics of the second tier of storage class memory.

3. The computer-implemented method of claim 2 , wherein the primary cache includes dynamic random access memory.

4. The computer-implemented method of claim 3 , wherein copying the updated data to the secondary cache includes:

determining whether the I/O request has a high priority associated therewith;

in response to determining that the I/O request has a high priority associated therewith, copying the updated data to the first tier of storage class memory;

in response to determining that the I/O request does not have a high priority associated therewith, determining whether the I/O request has a high write intensity associated therewith;

in response to determining that the I/O request has a high write intensity associated therewith, copying the updated data to the first tier of storage class memory; and

in response to determining that the I/O request does not have a high write intensity associated therewith, copying the updated data to the second tier of storage class memory.

5. The computer-implemented method of claim 1 , wherein the I/O request is a write request, wherein satisfying the I/O request using the primary cache includes:

determining whether the data associated with the I/O request is already located in the primary cache;

in response to determining that the data associated with the I/O request is not already located in the primary cache, determining whether the data associated with the I/O request is located in the secondary cache;

in response to determining that the data associated with the I/O request is located in the secondary cache, causing the data associated with the I/O request to be copied from the secondary cache to the primary cache;

invalidating the data associated with the I/O request located in the secondary cache; and

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache.

6. The computer-implemented method of claim 5 , comprising:

in response to determining that the data associated with the I/O request is not located in the secondary cache, determining whether the data associated with the I/O request is located in the data storage device;

in response to determining that the data associated with the I/O request is located in the data storage device, causing the data associated with the I/O request to be copied from the data storage device to the primary cache;

invalidating the data associated with the I/O request located in the data storage device;

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache; and

in response to determining that the data associated with the I/O request is not located in the data storage device, satisfying the I/O request using the primary cache.

7. The computer-implemented method of claim 1 , wherein the I/O request is a read request, wherein satisfying the I/O request using the primary cache includes:

determining whether the data associated with the I/O request is already located in the primary cache;

in response to determining that the data associated with the I/O request is not already located in the primary cache, determining whether the data associated with the I/O request is located in the secondary cache;

in response to determining that the data associated with the I/O request is located in the secondary cache, causing the data associated with the I/O request to be copied from the secondary cache to the primary cache; and

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache.

8. The computer-implemented method of claim 7 , comprising:

in response to determining that the data associated with the I/O request is not located in the secondary cache, causing the data associated with the I/O request to be copied from the data storage device to the primary cache; and

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache.

9. The computer-implemented method of claim 1 ,

comprising:

in response to determining that the I/O request includes a bypass indication, satisfying the I/O request using the secondary cache;

determining whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache; and

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache,

destaging the updated data from the secondary cache to the data storage device.

10. A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions readable and/or executable by a processor to cause the processor to:

receive, by the processor, an input/output (I/O) request;

determine, by the processor, whether the I/O request includes a bypass indication;

in response to determining that the I/O request does not include a bypass indication,

satisfy, by the processor, the I/O request using a primary cache, wherein the primary cache is coupled to a secondary cache and a data storage device, wherein

the secondary cache includes storage class memory;

determine, by the processor, whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the primary cache;

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the primary cache:

destage, by the processor, the updated data from the primary cache to the data storage device,

copy, by the processor, the updated data to the secondary cache, and

demote, by the processor, the updated data from the primary cache; and

in response to determining that the data associated with the I/O request has not been updated as the result of satisfying the I/O request using the primary cache:

copy, by the processor, the data associated with the I/O request to the secondary cache, and

demote, by the processor, the data associated with the I/O request from the primary cache.

11. The computer program product of claim 10 , wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory, wherein performance characteristics of the first tier of storage class memory are greater than performance characteristics of the second tier of storage class memory, wherein the primary cache includes dynamic random access memory.

12. The computer program product of claim 11 , wherein copying the updated data to the secondary cache includes:

determining whether the I/O request has a high priority associated therewith;

in response to determining that the I/O request has a high priority associated therewith,

copying the updated data to the first tier of storage class memory;

in response to determining that the I/O request does not have a high priority associated therewith, determining whether the I/O request has a high write intensity associated therewith;

in response to determining that the I/O request has a high write intensity associated therewith, copying the updated data to the first tier of storage class memory; and

in response to determining that the I/O request does not have a high write intensity associated therewith, copying the updated data to the second tier of storage class memory.

13. The computer program product of claim 10 , wherein the I/O request is a write request, wherein satisfying the I/O request using the primary cache includes:

determining whether the data associated with the I/O request is already located in the primary cache;

in response to determining that the data associated with the I/O request is not already located in the primary cache, determining whether the data associated with the I/O request is located in the secondary cache;

in response to determining that the data associated with the I/O request is located in the secondary cache, causing the data associated with the I/O request to be copied from the secondary cache to the primary cache;

invalidating the data associated with the I/O request located in the secondary cache; and

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache.

14. The computer program product of claim 13 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to determining that the data associated with the I/O request is not located in the secondary cache, determine, by the processor, whether the data associated with the I/O request is located in the data storage device;

in response to determining that the data associated with the I/O request is located in the data storage device, cause, by the processor, the data associated with the I/O request to be copied from the data storage device to the primary cache;

invalidate, by the processor, the data associated with the I/O request located in the data storage device;

satisfy, by the processor, the I/O request using the copy of the data associated with the I/O request located in the primary cache; and

in response to determining that the data associated with the I/O request is not located in the data storage device, satisfy, by the processor, the I/O request using the primary cache.

15. The computer program product of claim 10 , wherein the I/O request is a read request, wherein satisfying the I/O request using the primary cache includes:

determining whether the data associated with the I/O request is already located in the primary cache;

in response to determining that the data associated with the I/O request is not already located in the primary cache, determining whether the data associated with the I/O request is located in the secondary cache;

in response to determining that the data associated with the I/O request is located in the secondary cache, causing the data associated with the I/O request to be copied from the secondary cache to the primary cache; and

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache.

16. The computer program product of claim 15 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to determining that the data associated with the I/O request is not located in the secondary cache, cause, by the processor, the data associated with the I/O request to be copied from the data storage device to the primary cache; and

satisfy, by the processor, the I/O request using the copy of the data associated with the I/O request located in the primary cache.

17. The computer program product of claim 10 , wherein the program instructions are readable and/or executable by the processor to cause the processor to:

in response to determining that the I/O request includes a bypass indication, satisfy, by the processor, the I/O request using the secondary cache;

determine, by the processor, whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache; and

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache, destage,

by the processor, the updated data from the secondary cache to the data storage device.

18. A system, comprising:

a processor, wherein the processor is coupled to a primary cache and a secondary cache,

wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory; and

logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to:

receive, by the processor, an input/output (I/O) request;

determine, by the processor, whether the I/O request includes a bypass indication;

in response to determining that the I/O request does not include a bypass indication, satisfy, by the processor, the I/O request using the primary cache, wherein the primary cache is coupled to the secondary cache and a data storage device;

determine, by the processor, whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the primary cache;

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the primary cache:

destage, by the processor, the updated data from the primary cache to the data storage device,

copy, by the processor, the updated data to the secondary cache, and

demote, by the processor, the updated data from the primary cache; and

in response to determining that the data associated with the I/O request has not been updated as the result of satisfying the I/O request using the primary cache:

copy, by the processor, the data associated with the I/O request to the secondary cache, and

demote, by the processor, the data associated with the I/O request from the primary cache.

19. The system of claim 18 , wherein performance characteristics of the first tier of storage class memory are greater than performance characteristics of the second tier of storage class memory, wherein the primary cache includes dynamic random access memory, wherein the processor is physically electrically coupled to both the primary cache and the secondary cache.

20. The system of claim 19 , wherein copying the updated data to the secondary cache includes:

determining whether the I/O request has a high priority associated therewith;

in response to determining that the I/O request has a high priority associated therewith,

copying the updated data to the first tier of storage class memory;

in response to determining that the I/O request does not have a high priority associated therewith, determining whether the I/O request has a high write intensity associated therewith;

in response to determining that the I/O request has a high write intensity associated therewith, copying the updated data to the first tier of storage class memory; and

in response to determining that the I/O request does not have a high write intensity associated therewith, copying the updated data to the second tier of storage class memory.

21. The system of claim 18 , wherein the I/O request is a write request, wherein

satisfying the I/O request using the primary cache includes:

determining whether the data associated with the I/O request is already located in the primary cache;

in response to determining that the data associated with the I/O request is not already located in the primary cache, determining whether the data associated with the I/O request is located in the secondary cache;

in response to determining that the data associated with the I/O request is located in the secondary cache, causing the data associated with the I/O request to be copied from the secondary cache to the primary cache;

invalidating the data associated with the I/O request located in the secondary cache; and

satisfying the I/O request using the copy of the data associated with the I/O request located in the primary cache.

22. The system of claim 21 , the logic being configured to:

in response to determining that the data associated with the I/O request is not located in the secondary cache, determine, by the processor, whether the data associated with the I/O request is located in the data storage device;

in response to determining that the data associated with the I/O request is located in the data storage device, cause, by the processor, the data associated with the I/O request to be copied from the data storage device to the primary cache;

invalidate, by the processor, the data associated with the I/O request located in the data storage device;

satisfy, by the processor, the I/O request using the copy of the data associated with the I/O request located in the primary cache; and

in response to determining that the data associated with the I/O request is not located in the data storage device, satisfy, by the processor, the I/O request using the primary cache.

23. The system of claim 18 , the logic being configured to:

in response to determining that the I/O request includes a bypass indication, satisfy, by the processor, the I/O request using the secondary cache;

determine, by the processor, whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache; and

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache, destage,

by the processor, the updated data from the secondary cache to the data storage device.

24. A system, comprising:

a processor, wherein the processor is coupled to: a primary cache, a secondary cache, and

a data storage device, wherein the primary cache includes dynamic random access memory, wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory, wherein performance characteristics associated with the first tier of storage class memory in the secondary cache are greater than performance characteristics associated with the second tier of storage class memory in the secondary cache; and

logic integrated with the processor, executable by the processor, or integrated with and executable by the processor, the logic being configured to:

receive, by the processor, an input/output (I/O) request;

determine, by the processor, whether the I/O request includes a bypass indication;

in response to determining that the I/O request includes a bypass indication,

determine, by the processor, whether to satisfy the I/O request using the first tier of storage class memory in the secondary cache by inspecting the bypass indication;

in response to determining to satisfy the I/O request using the first tier of storage class memory in the secondary cache, satisfy, by the processor,

the I/O request using the first tier of storage class memory in the secondary cache;

determine, by the processor, whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache; and

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache, destage, by the processor, the updated data from the secondary cache to the data storage device.

25. A computer-implemented method, comprising:

receiving an input/output (I/O) request;

determining whether the I/O request includes a bypass indication;

in response to determining that the I/O request includes a bypass indication, satisfying the I/O request using a secondary cache, wherein the secondary cache is coupled to a primary cache and a data storage device, wherein the primary cache includes dynamic random access memory, wherein the secondary cache includes a first tier of storage class memory and a second tier of storage class memory;

determining whether data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache;

in response to determining that the data associated with the I/O request has been updated as the result of satisfying the I/O request using the secondary cache,

destaging the updated data from the secondary cache to the data storage device;

in response to determining that the I/O request does not include a bypass indication,

satisfying the I/O request using the primary cache; and

in response to determining that the data associated with the I/O request has not been updated as the result of satisfying the I/O request using the primary cache:

copying the data associated with the I/O request to the secondary cache, and

demoting the data associated with the I/O request from the primary cache.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 21, 2020
From: GUPTA, LOKESH MOHAN; LIN, EDWARD HSIU-WEI; PETERSON, BETH ANN; BORLICK, MATTHEW G.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 051886/0300 →
Continuity (1)
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