TVS diode circuit with high energy dissipation and linear capacitance
A TVS circuit having a first diode with a cathode coupled to a first terminal and an anode coupled to a first node. A second diode has an anode coupled to a second node and a cathode coupled to a third node. A third diode is coupled between the first node and second node. A fourth diode is coupled between the first node and third node. A fifth diode is coupled between the second node and a second terminal. A sixth diode is coupled between the second terminal and the third node. A seventh diode can be coupled between the second terminal and an intermediate node between the fifth diode and sixth diode. The first diode is disposed on a first semiconductor die, while the second diode is disposed on a second semiconductor die. Alternatively, the first diode and second diode are disposed on a single semiconductor die.
1. A transient voltage suppression (TVS) circuit, consisting of:
a first diode including a cathode coupled to a first terminal of the TVS circuit and an anode coupled to a first node, wherein the first diode is disposed on a first semiconductor die;
a silicon controlled rectifier including a first conduction terminal coupled to a second node and a second conduction terminal coupled to a third node;
a second diode coupled between the first node and second node;
a third diode coupled between the first node and third node;
a fourth diode coupled between the second node and a second terminal of the TVS circuit; and
a fifth diode coupled between the second terminal and the third node to provide the TVS circuit.
2. The transient voltage suppression circuit of claim 1 , wherein the first diode is within a high voltage portion of the transient voltage suppression circuit.
3. The transient voltage suppression circuit of claim 1 , wherein the silicon controlled rectifier is disposed within a low voltage portion of the transient voltage suppression circuit.
4. The transient voltage suppression circuit of claim 1 , wherein the silicon controlled rectifier is disposed on a second semiconductor die.
5. The transient voltage suppression circuit of claim 1 , wherein the silicon controlled rectifier includes:
a first transistor comprising a first conduction terminal coupled to the first node; and
a second transistor comprising a first conduction terminal coupled to a control terminal of the first transistor, a second conduction terminal coupled to the third node, and a control terminal coupled to a second conduction terminal of the first transistor.
6. A transient voltage suppression (TVS) circuit, consisting of:
a first diode including a cathode coupled to a first terminal of the TVS circuit and an anode coupled to a first node;
a silicon controlled rectifier including a first conduction terminal coupled to a second node and a second conduction terminal coupled to a third node, wherein the first diode and silicon controlled rectifier are disposed on a semiconductor die;
a second diode coupled between the first node and second node;
a third diode coupled between the first node and third node;
a fourth diode coupled between the second node and a second terminal of the TVS circuit; and
a fifth diode coupled between the second terminal and the third node to provide the TVS circuit.
7. A transient voltage suppression (TVS) circuit, comprising:
a first high voltage TVS diode coupled between a first terminal of the TVS circuit and a first node, wherein the first high voltage TVS diode is disposed on a first semiconductor die;
a silicon controlled rectifier coupled between a second node and a third node, wherein the silicon controlled rectifier is disposed on a second semiconductor die; and
a diode bridge coupled between the second node and third node and a second terminal of the TVS circuit.
8. The transient voltage suppression circuit of claim 7 , wherein the diode bridge includes:
a second diode coupled between the first node and second node;
a third diode coupled between the first node and third node;
a fourth diode coupled between the second node and the second terminal; and
a fifth diode coupled between the second terminal and the third node.
9. The transient voltage suppression circuit of claim 7 , further including a second high voltage TVS diode coupled between the second terminal and an intermediate node of the diode bridge.
10. The transient voltage suppression circuit of claim 8 , wherein the silicon controlled rectifier includes:
a first transistor comprising a first conduction terminal coupled to the first node; and
a second transistor comprising a first conduction terminal coupled to a control terminal of the first transistor, a second conduction terminal coupled to the third node, and a control terminal coupled to a second conduction terminal of the first transistor.
11. A method of making a transient voltage suppression (TVS) circuit, comprising:
providing a first diode including a cathode coupled to a first terminal of the TVS circuit and an anode coupled to a first node;
disposing the first diode on a first semiconductor die;
providing a silicon controlled rectifier including a first conduction terminal coupled to a second node and a second conduction terminal coupled to a third node;
disposing the silicon controlled rectifier on a second semiconductor die;
providing a second diode coupled between the first node and second node;
providing a third diode coupled between the first node and third node;
providing a fourth diode coupled between the second node and a second terminal of the TVS circuit; and
providing a fifth diode coupled between the second terminal and the third node.
12. The method of claim 11 , further including providing a sixth diode comprising a cathode coupled to the second terminal and an anode coupled to an intermediate node between the fourth diode and fifth diode.
13. The method of claim 11 , further including disposing the first diode within a high voltage portion of the transient voltage suppression circuit.
14. The method of claim 11 , further including disposing the silicon controlled rectifier within a low voltage portion of the transient voltage suppression circuit.
15. The method of claim 11 , wherein providing the silicon controlled rectifier includes:
providing a first transistor comprising a first conduction terminal coupled to the first node; and
providing a second transistor comprising a first conduction terminal coupled to a control terminal of the first transistor, a second conduction terminal coupled to the third node, and a control terminal coupled to a second conduction terminal of the first transistor.
16. A transient voltage suppression (TVS) circuit, consisting of:
a first diode including a cathode coupled to a first terminal of the TVS circuit and an anode coupled to a first node, wherein the first diode is disposed on a first semiconductor die;
a silicon controlled rectifier including a first conduction terminal coupled to a second node and a second conduction terminal coupled to a third node;
a second diode coupled between the first node and second node;
a third diode coupled between the first node and third node;
a fourth diode coupled between the second node and a second terminal of the TVS circuit;
a fifth diode coupled between the second terminal and the third node; and
a sixth diode comprising a cathode coupled to the second terminal and an anode coupled to an intermediate node between the fourth diode and fifth diode to provide the TVS circuit.
17. The transient voltage suppression circuit of claim 16 , wherein the silicon controlled rectifier is disposed on a second semiconductor die.