IP Library Granted Patent US 10,996,531
Granted Patent B1
US 10,996,531 · App. 16/788,766 · Granted May 4, 2021

Display device electrical lines

Inventors: Asuka Higashi (Hyogo, JP); Teruhisa Nakagawa (Hyogo, JP)
Assignee: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
G02F1/136286G02F1/1368G02F1/13394G02F1/13452G02F1/133514H01L27/124
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,996,531
App. No.
16/788,766
Granted
May 4, 2021
Kind
B1
Abstract

A display device includes a display area, a source driver, a gate driver, a first substrate, a second substrate, and a liquid crystal layer. The liquid crystal layer is disposed between the first substrate and the second substrate. The second substrate includes source lines, gate lines, gate lead-out lines, and bridge lines. The source lines are electrically connected to the source driver. The gate lead-out lines electrically connect the gate driver to the gate lines. The bridge lines connect pairs of the gate lead-out lines that are adjacent in the second direction. At least one of the gate lines is electrically connected to the gate driver via at least two of the gate lead-out lines and one of the bridge lines.

Claims (54)

1. A display device, comprising:

a display area with a first side;

a source driver disposed along the first side of the display area in plan view;

a gate driver disposed along the first side of the display area in the plan view;

a first substrate;

a second substrate including:

source lines extending in a first direction in the display area and electrically connected to the source driver,

gate lines extending in a second direction in the display area and electrically connected to the gate driver,

gate lead-out lines extending in the first direction in the display area and electrically connecting the gate driver to the gate lines, and

bridge lines extending in the second direction in the display area and connecting pairs of the gate lead-out lines that are adjacent in the second direction, wherein the gate lines are electrically connected to the gate driver via at least two of the gate lead-out lines and one of the bridge lines;

a liquid crystal layer disposed between the first substrate and the second substrate; and

spacers extending from the first substrate to the second substrate and located in the display area in the plan view, the second substrate including base portions that contact the spacers, the base portions each located at an overlap of one of the source lines and one of the gate lines in the plan view, wherein

the gate lead-out lines are spaced apart from the base portions in plan view.

2. The display device of claim 1 , wherein

the gate lead-out lines include a first gate lead-out line and a second gate lead-out line that are adjacent in the second direction, and the bridge lines include a first bridge line that extends from the first gate lead-out line to the second gate lead-out line, and

the gate driver is electrically connected to a first gate line of the gate lines via the first gate lead-out line, the second gate lead-out line, and the first bridge line.

3. The display device of claim 2 , wherein

the gate lead-out lines include a third gate lead-out line, the third gate lead-out line being adjacent to the first gate lead-out line in the first direction and adjacent to the second gate lead-out line in the second direction, and the bridge lines include a second bridge line that extends from the second gate lead-out line to the third gate lead-out line, and

the gate driver is electrically connected to the first gate line via the first gate lead-out line, the second gate lead-out line, the third gate lead-out line, the first bridge line, and the second lead-out line.

4. The display device of claim 1 , wherein

the gate lead-out lines include a first gate lead-out line, a second gate lead-out line, and a third gate lead-out line that are adjacent in the second direction, and

the bridge lines include a first bridge line, the first bridge line extending from the first gate lead-out line to the second gate lead-out line in the second direction and from the second gate lead-out line towards the third gate lead-out line in the second direction, and the first bridge line spaced apart from the third gate lead-out line.

5. The display device of claim 1 , wherein in each pair of the pairs of the gate lead-out lines that are adjacent in the second direction, the pair of the gate lead-out lines are connected by two or more of the bridge lines.

6. The display device of claim 1 , wherein in each pair of the gate lead-out lines of the pairs of the gate lead-out lines that are adjacent in the second direction, three or more of the bridge lines independently electrically connect the pair of the gate lead-out lines, the three or more of the bridge members spaced apart in the first direction.

7. The display device of claim 1 , wherein the second substrate includes floating lines, each of the floating lines extends between two of the gate lead-out lines that are adjacent in the second direction, and the floating lines spaced apart from the gate lead-out lines and the bridge line.

8. The display device of claim 7 , wherein the two of the gate lead-out lines are one of the pairs of the gate lead-out lines connected by the bridge lines.

9. The display device of claim 8 , wherein the floating lines are electrically unconnected from the gate lead-out lines.

10. The display device of claim 1 , wherein the source lines are formed in a first layer, the gate lines are formed in a second layer, and the gate lead-out lines are formed in a third layer, and the first layer, the second layer, and third layer are different layers of the second substrate.

11. The display device of claim 10 , wherein the first layer, the second layer, and the third layer are in stacked in said order.

12. The display device of claim 1 , wherein the second substrate includes pixel electrodes and thin film transistors, each of the pixel electrodes electrically connected to one of the gate lines and one of the source lines by one of the thin film transistors.

13. The display device of claim 1 , wherein the gate lead-out lines overlap with the source lines in the plan view.

14. The display device of claim 1 , wherein the first substrate includes color filters.

15. The display device of claim 1 , wherein the second substrate includes at least one gate line that is electrically connected to the gate driver without the bridge lines.

16. A display device, comprising:

a display area with a first side;

a source driver disposed along the first side of the display area in plan view;

a gate driver disposed along the first side of the display area in the plan view;

a first substrate;

a second substrate including:

source lines extending in a first direction in the display area and electrically connected to the source driver,

gate lines extending in a second direction in the display area and electrically connected to the gate driver,

gate lead-out lines extending in the first direction in the display area and electrically connecting the gate driver to the gate lines, and

bridge lines extending in the second direction in the display area and connecting pairs of the gate lead-out lines that are adjacent in the second direction, wherein the gate lines are electrically connected to the gate driver via at least two of the gate lead-out lines and one of the bridge lines;

a liquid crystal layer disposed between the first substrate and the second substrate; and

spacers extending from the first substrate to the second substrate in the display area in the plan view, the spacers overlapping a location at which one of the source lines and one of the gate lines overlap in the plan view, wherein

the gate lead-out lines are spaced apart from the spacers in plan view.

17. The display device of claim 16 , wherein

the gate lead-out lines include a first gate lead-out line and a second gate lead-out line that are adjacent in the second direction, and the bridge lines include a first bridge line that extends from the first gate lead-out line to the second gate lead-out line, and

the gate driver is electrically connected to a first gate line of the gate lines via the first gate lead-out line, the second gate lead-out line, and the first bridge line.

18. The display device of claim 16 , wherein

the gate lead-out lines include a first gate lead-out line, a second gate lead-out line, and a third gate lead-out line that are adjacent in the second direction, and

the bridge lines include a first bridge line, the first bridge line extending from the first gate lead-out line to the second gate lead-out line in the second direction and from the second gate lead-out line towards the third gate lead-out line in the second direction, and the first bridge line spaced apart from the third gate lead-out line.

19. The display device of claim 16 , wherein in each pair of the gate lead-out lines of the pairs of the gate lead-out lines that are adjacent in the second direction, three or more of the bridge lines independently electrically connect the pair of the gate lead-out lines, the three or more of the bridge members spaced apart in the first direction.

20. The display device of claim 16 , wherein the second substrate includes floating lines, each of the floating lines extends between two of the gate lead-out lines that are adjacent in the second direction, and the floating lines spaced apart from the gate lead-out lines and the bridge line.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2023
From: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 064292/0775 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 13, 2020
From: HIGASHI, ASUKA; NAKAGAWA, TERUHISA
To: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
Reel/Frame 052374/0461 →