IP Library Granted Patent US 11,373,809
Granted Patent B2
US 11,373,809 · App. 16/788,804 · Granted Jun 28, 2022

Multilayer ceramic capacitor including conductive vias

Inventors: Marianne Berolini (Greenville, SC); Jeffrey Horn (Simpsonville, SC); Jeffrey Cain (Greenville, SC)
Assignee: KYOCERA AVX Components Corporation
H01G4/242H01G4/0085H01G4/012H01G4/2325H01L23/642H01L25/18H05K1/181H01G4/30H05K2201/10015H05K2201/10515
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Quick Facts
Patent No.
US 11,373,809
App. No.
16/788,804
Granted
Jun 28, 2022
Kind
B2
Abstract

The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.

Claims (31)

1. A multilayer ceramic capacitor comprising:

a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface,

a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers,

wherein the first plurality of internal electrode layers comprises a first active electrode and a first anchor electrode,

wherein the second plurality of internal electrode layers comprises a second active electrode,

a first through-hole conductive via electrically connecting the first active electrode of the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor, and

a second through-hole conductive via electrically connecting the second active electrode of the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor, wherein the second through-hole conductive via contacts the first anchor electrode, and

wherein the at least one side surface does not include an external terminal.

2. The multilayer ceramic capacitor according to claim 1 , wherein the second plurality of internal electrode layers further comprises a second anchor electrode.

3. The multilayer ceramic capacitor according to claim 2 , wherein the first through-hole conductive via contacts the second anchor electrode.

4. The multilayer ceramic capacitor according to claim 1 , wherein the main body further includes a shield electrode layer.

5. The multilayer ceramic capacitor according to claim 4 , wherein the main body includes a shield electrode layer above and below the internal electrode layers.

6. The multilayer ceramic capacitor according to claim 1 , wherein an electrically insulated gap is formed between the first through-hole conductive via and the second plurality of internal electrode layers.

7. The multilayer ceramic capacitor according to claim 1 , wherein an electrically insulated gap is formed between the second through-hole conductive via and the first plurality of internal electrode layers.

8. The multilayer ceramic capacitor according to claim 1 , wherein the average length of the first through-hole conductive via is 10 times or less to 0.01 times or more the average pitch between the first through-hole conductive via and an adjacent second through-hole conductive via.

9. The multilayer ceramic capacitor according to claim 1 , wherein the average pitch between a first through-hole conductive via and a second through-hole conductive via is from 0.1 mm to 2 mm.

10. The multilayer ceramic capacitor according to claim 1 , wherein the dielectric layers comprise a ceramic.

11. The multilayer ceramic capacitor according to claim 10 , wherein the ceramic comprises a titanate.

12. The multilayer ceramic capacitor according to claim 1 , wherein the internal electrode layers comprise a conductive metal.

13. The multilayer ceramic capacitor according to claim 12 , wherein the conductive metal comprises nickel or an alloy thereof.

14. The multilayer ceramic capacitor according to claim 1 , wherein the external terminals are electroplated layers.

15. The multilayer ceramic capacitor according to claim 1 , wherein the external terminals are electroless plated layers.

16. The multilayer ceramic capacitor according to claim 1 , wherein the external terminals comprise a conductive metal.

17. The multilayer ceramic capacitor according to claim 16 , wherein the conductive metal comprises silver, gold, palladium, platinum, tin, nickel, chrome, titanium, tungsten, or combinations or alloys thereof.

18. The multilayer ceramic capacitor according to claim 16 , wherein the conductive metal comprises copper or an alloy thereof.

19. A circuit board containing the multilayer ceramic capacitor of claim 1 .

20. The circuit board of claim 19 , wherein the board further comprises an integrated circuit package.

21. The circuit board of claim 20 , wherein the capacitor is positioned between the circuit board and the integrated circuit package in a vertical direction such that the circuit board, the capacitor, and the integrated circuit package are present in a stacked arrangement.

22. The circuit board of claim 20 , wherein the capacitor is directly connected to the circuit board and the integrated circuit package.

23. A communications device comprising the circuit board of claim 19 .

24. The communications device of claim 23 , wherein the device includes an Ethernet system, a wireless network router, a fiber optic communications system, or a storage device.

Assignments (2)
CHANGE OF NAME Recorded Dec 22, 2021
From: AVX CORPORATION
To: KYOCERA AVX COMPONENTS CORPORATION
Reel/Frame 058563/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2020
From: BEROLINI, MARIANNE; HORN, JEFFREY; CAIN, JEFFREY
To: AVX CORPORATION
Reel/Frame 052231/0041 →
Continuity (2)
Provisional Application 62804944 · Feb 13, 2019
Related Publication 20200258688A1 · Aug 13, 2020
Cited By (2)
US 12,580,126 US 12,614,677